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AD8313 датащи(PDF) 12 Page - Analog Devices

номер детали AD8313
подробное описание детали  0.1 GHz-2.5 GHz, 70 dB Logarithmic Detector/Controller
PDF  16 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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AD8313 датащи(HTML) 12 Page - Analog Devices

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AD8313
–12–
REV. B
Typically, the AD8313 will need to be matched to 50
Ω. The
input impedance of the AD8313 at 100 MHz can be read from
the Smith Chart (Figure 24) and corresponds to a resistive input
impedance of 900
Ω in parallel with a capacitance of 1.1 pF.
To make the matching process simpler, the input capacitance of
the AD8313, CIN, can be temporarily removed from the calcula-
tion by adding a virtual shunt inductor (L2), which will resonate
away CIN (Figure 34). This inductor will be factored back into
the calculation later. This allows the main calculation to be
based on a simple resistive-to-resistive match (i.e., 50
Ω to
900
Ω).
The resonant frequency is defined by the equation
ω=
1
2
LCIN
therefore: L2 =
1
2
ω C
IN
= 2.3
µH
CMATCH =
(C1 • C2)
(C1 + C2)
LMATCH =
(L1 • L2)
(L1 + L2)
C1
C2
CIN
RIN
AD8313
50
50
SOURCE
L1
L2
TEMPORARY
INDUCTANCE
Figure 34. Input Matching Example
With CIN and L2 temporarily out of the picture, the focus is now
on matching a 50
Ω source resistance to a (purely resistive) load
of 900
Ω and calculating values for C
MATCH and L1.
When RR
L
C
SIN
MATCH
=
1
the input will look purely resistive at a frequency given by
f
LC
O
MATCH
=
1
2
1
π
= 100 MHz
Solving for CMATCH gives
C
RR
f
pF
MATCH
SIN
O
==
11
2
75
π
.
Solving for L1 gives
L
RR
f
SIN
O
1
2
=
π
= 337.6 nH
Because L1 and L2 are in parallel, they can be combined to give
the final value for LMATCH (i.e.)
L
LL
LL
MATCH
=
+
12
12
= 294 nH
C1 and C2 can be chosen in a number of ways. First C2 can be
set to a large value such as 1000 pF, so that it appears as an RF
short. C1 would then be set equal to the calculated value of
CMATCH. Alternatively, C1 and C2 can each be set to twice
CMATCH so that the total series capacitance is equal to CMATCH.
By making C1 and C2 slightly unequal (i.e., select C2 to be
about 10% less than C1) but keeping their series value the
same, the amplitude of the signals on INHI and INLO can be
equalized so that the AD8313 is driven in a more balanced
manner. Any one of the three options detailed above can be
used as long as the combined series value of C1 and C2 (i.e.,
C1
× C2/(C1 + C2)) is equal to C
MATCH.
In all cases, the values of CMATCH and LMATCH must be chosen
from standard values. At this point, these values need now be
installed on the board and measured for performance at 100 MHz.
Because of board and layout parasitics, the component values
from the above example had to be tuned to the final values of
CMATCH = 8.9 pF and LMATCH = 270 nH shown in Table I.
Assuming a lossless matching network and noting conservation
of power, the impedance transformation from RS to RIN (50
to 900
Ω) has an associated voltage gain given by
Gain
R
R
dB
IN
S
20 log
= 12.6 dB
Because the AD8313 input responds to voltage and not true
power, the voltage gain of the matching network will increase
the effective input low-end power sensitivity by this amount.
Thus, in this case, the dynamic range will be shifted down-
wards, that is, the 12.6 dB voltage gain will shift the 0 dBm to
–65 dBm input range downwards to –12.6 dBm to –77.6 dBm.
However, because of network losses this gain will not be fully
realized in practice. Reference Figures 31 and 32 for an example
of practical attainable voltage gains.
Table I shows recommended values for the inductor and capaci-
tors in Figure 32 for some selected RF frequencies along with the
associated theoretical voltage gain. These values for a reactive
match are optimal for the board layout detailed as Figure 45.
As previously discussed, a modification of the board layout will
produce networks that may not perform as specified. At 2.5 GHz, a
shunt inductor is sufficient to achieve match. Consequently, C1
and C2 are set sufficiently high that they appear as RF shorts.
Table I. Recommended Values for C1, C2 and LMATCH in
Figure 33
Freq.
CMATCH
C1
C2
LMATCH
Voltage
(MHz)
(pF)
(pF)
(pF)
(nH)
Gain (dB)
100
8.9
22
15
270
12.6
9
1000
270
900
1.5
3
3
8.2
9.0
1.5
1000
8.2
1900
1.5
3
3
2.2
6.2
1.5
1000
2.2
2500
Large
390
390
2.2
3.2
Figure 35 shows the voltage response of the 100 MHz matching
network; note the high attenuation at lower frequencies typical
of a high-pass network.



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