AD7856ARS datasheet(21/32 Pages) AD

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AD7856

–21–

REV. A

0.1

100

THROUGHPUT – kSPS

Figure 24. Power vs. Throughput Rate (6 MHz CLK)

CALIBRATION SECTION

Calibration Overview

The automatic calibration that is performed on power up en-

sures that the calibration options covered in this section will not

be required in a significant amount of applications. The user

will not have to initiate a calibration unless the operating condi-

tions change (CLKIN frequency, analog input mode, reference

voltage, temperature, and supply voltages). The AD7856 has a

number of calibration features that may be required in some

applications and there are a number of advantages in performing

these different types of calibration. First, the internal errors in

the ADC can be reduced significantly to give superior dc perfor-

mance, and secondly, system offset and gain errors can be re-

moved. This allows the user to remove reference errors (whether

it be internal or external reference) and to make use of the full

dynamic range of the AD7856 by adjusting the analog input

range of the part for a specific system.

There are two main calibration modes on the AD7856, self-

calibration and system calibration. There are various options in

both self-calibration and system calibration as outlined previ-

ously in Table IV. All the calibration functions can be initiated

by pulsing the

CAL pin or by writing to the control register and

setting the STCAL bit to one. The timing diagrams that follow

involve using the

CAL pin.

The duration of each of the different types of calibrations is

given in Table VIII for the AD7856 with a 6 MHz master clock.

These calibration times are master clock dependent.

Table VIII. Calibration Times (AD7856 with 6 MHz CLKIN)

Type of Self- or

System Calibration

Time

Full

41.7 ms

Offset + Gain

9.26 ms

Offset

4.63 ms

Gain

4.63 ms

Automatic Calibration on Power-On

The

CAL pin has a 0.15

µA pull up current source connected to

it internally to allow for an automatic full self-calibration on

power-on. A full self-calibration will be initiated on power-on if

a capacitor is connected from the

CAL pin to DGND. The

internal current source connected to the

CAL pin charges up

the external capacitor and the time required to charge the exter-

nal capacitor will depend on the size of the capacitor itself. This

time should be large enough to ensure that the internal refer-

ence is settled before the calibration is performed. A 33 nF

capacitor is sufficient to ensure that the internal reference has

settled (see Power-Up Times) before a calibration is initiated

taking into account trigger level and current source variations on

the

CAL pin. However, if an external reference is being used,

this reference must have stabilized before the automatic calibra-

tion is initiated (a larger capacitor on the

CAL pin should be

used if the external reference has not settled when the autocali-

bration is initiated). Once the capacitor on the

CAL pin has

charged, the calibration will be performed which will take 42 ms

(6 MHz CLKIN). Therefore the autocalibration should be

complete before operating the part. After calibration, the part is

accurate to the 14-bit level and the specifications quoted on the

data sheet apply. There will be no need to perform another

calibration unless the operating conditions change or unless a

system calibration is required.

Self-Calibration Description

There are four different calibration options within the self-

calibration mode. First, there is a full self-calibration where the

DAC, internal gain, and internal offset errors are calibrated out.

Then, there is the (Gain + Offset) self-calibration which cali-

brates out the internal gain error and then the internal offset

errors. The internal DAC is not calibrated here. Finally, there

are the self-offset and self-gain calibrations which calibrate out

the internal offset errors and the internal gain errors respectively.

The internal capacitor DAC is calibrated by trimming each of

the capacitors in the DAC. It is the ratio of these capacitors to

each other that is critical, and so the calibration algorithm en-

sures that this ratio is at a specific value by the end of the cali-

bration routine. For the offset and gain there are two separate

capacitors, one of which is trimmed when an offset or gain cali-

bration is performed. Again, it is the ratio of these capacitors to

the capacitors in the DAC that is critical and the calibration

algorithm ensures that this ratio is at a specified value for both

the offset and gain calibrations.

The zero-scale error is adjusted for an offset calibration, and the

positive full-scale error is adjusted for a gain calibration.

Self-Calibration Timing

The diagram of Figure 25 shows the timing for a full self-

calibration. Here the BUSY line stays high for the full length of

the self-calibration. A self-calibration is initiated by bringing the

CAL pin low (which initiates an internal reset) and then high

again or by writing to the control register and setting the STCAL

bit to 1 (note that if the part is in a power-down mode the

CAL pulse -

width must take account of the power-up time ). The BUSY line is

triggered high from the rising edge of

CAL (or the end of the

write to the control register if calibration is initiated in soft-

ware), and BUSY will go low when the full-self calibration is

complete after a time tCAL as shown in Figure 25.

For the self- (gain + offset), self-offset and self-gain calibrations

the BUSY line will be triggered high by the rising edge of the

CAL signal (or the end of the write to the control register if

calibration is initiated in software) and will stay high for the

full duration of the self calibration. The length of time that

the BUSY is high will depend on the type of self-calibration that

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