AD7834/AD7835

REV. A

–15–

from –5 V to +5 V with respect to DUT GND as the DAC in-

voltage is also applied to the DSG A pin. When a clear is per-

formed on the AD7835, the output of the pin driver will be 0 V

with respect to DUT GND.

4

6

8

13

7

3

1

15

14

9

16

2

10 11 12

1µF

+15V –15V

0.1µF

AD588

4

6

8

13

7

3

1

15

14

16

2

10

11

12

1µF

+15V –15V

AD588

8

DUT

GND

TO TESTER

WINDOW

COMPARATOR

–15V

+15V

DSG A

AD7835

*

DSG B

AGND

DUT

GND

DUT

GND

PIN

DRIVER

Figure 29. ATE Application

The other AD588 is used to provide a reference voltage for

DACs 3 and 4. These provide the reference voltages for the

window comparator shown in the diagram. Note that Pin 9 of

DAC 4 input codes vary from 000 . . . 000 to 111 . . . 111,

GND. DUT GND is also connected to DSG B. When the

respect to DUT GND.

Care must be taken to ensure that the maximum and minimum

voltage specs for the AD7835 reference voltages are not broken

in the above configuration.

Power Supply Bypassing and Grounding

In any circuit where accuracy is important, careful consideration

of the power supply and ground return layout helps to ensure

the rated performance. The printed circuit board on which the

AD7834/AD7835 is mounted should be designed such that the

analog and digital sections are separated and confined to certain

areas of the board. This facilitates the use of ground planes that

can be separated easily. A minimum etch technique is generally

best for ground planes as it gives the best shielding. Digital and

analog ground planes should only be joined at one place. If the

AD7834/AD7835 is the only device requiring an AGND to

DGND connection, then the ground planes should be con-

nected at the AGND and DGND pins of the AD7834/AD7835.

If the AD7834/AD7835 is in a system where multiple devices

require an AGND to DGND connection, the connection should

still be made at one point only, a star ground point which

should be established as close as possible to the AD7834/

AD7835.

Digital lines running under the device should be avoided as

these will couple noise onto the die. The analog ground plane

should be allowed to run under the AD7834/AD7835 to avoid

noise coupling. The power supply lines of the AD7834/

AD7835 should use as large a trace as possible to provide low

impedance paths and reduce the effects of glitches on the power

supply line. Fast switching signals like clocks should be shielded

with digital ground to avoid radiating noise to other parts of the

board and should never be run near the analog inputs. Avoid

crossover of digital and analog signals. Traces on opposite sides

of the board should run at right angles to each other. This re-

duces the effects of feedthrough through the board. A

microstrip technique is by far the best but not always possible

with a double sided board. In this technique, the component

side of the board is dedicated to ground plane while signal traces

are placed on the solder side.

The AD7834/AD7835 should have ample supply bypassing lo-

cated as close to the package as possible, ideally right up against

the device. Figure 30 shows the recommended capacitor values

of 10

µF in parallel with 0.1 µF on each of the supplies. The

10

µF capacitors are the tantalum bead type. The 0.1 µF ca-

pacitor should have low Effective Series Resistance (ESR) and

Effective Series Inductance (ESI), such as the common ceramic

types, which provide a low impedance path to ground at high

frequencies to handle transient currents due to internal logic

switching.

10µF

0.1µF

10µF

0.1µF

10µF

0.1µF

AD7834/

AD7835

*

AGND

DGND

Figure 30. Power Supply Decoupling