PCAL9539APW datasheet(21/48 Pages) NXP

21 / 48 page

PCAL9539A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 3 October 2012

21 of 48

NXP Semiconductors

PCAL9539A

16-bit I2C-bus and SMBus low power I/O port with interrupt and reset

Application design-in information

8.1 Minimizing IDD when the I/Os are used to control LEDs

When the I/Os are used to control LEDs, they are normally connected to VDD through a

resistor as shown in Figure 13. Since the LED acts as a diode, when the LED is off the I/O

VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes lower

than VDD.

Designs needing to minimize current consumption, such as battery power applications,

should consider maintaining the I/O pins greater than or equal to VDD when the LED is off.

Figure 14 shows a high value resistor in parallel with the LED. Figure 15 shows VDD less

than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VI

at or above VDD and prevents additional supply current consumption when the LED is off.

Device address configured as 1110 100X for this example.

P0_0, P0_2, P0_3 configured as outputs.

P0_1, P0_4, P0_5 configured as inputs.

P0_6, P0_7 and (P1_0 to P1_7) configured as inputs.

(1) External resistors are required for inputs (on P port) that may float. Also, internal pull-up or pull-down may be used to eliminate

the need for external components. If a driver to an input will never let the input float, a resistor is not needed. If an output in the

P port is configured as a push-pull output there is no need for external pull-up resistors. If an output in the P port is configured

as an open-drain output, external pull-up resistors are required.

Fig 13. Typical application

PCAL9539A

P0_0

P0_1

SCL

SDA

VDD

(3.3 V)

MASTER

CONTROLLER

SCL

SDA

INT

P0_2

VDD

VSS

INT

10 kΩ

SUB-SYSTEM 1(1)

(e.g., temp sensor)

P0_3

INT

SUB-SYSTEM 2

(e.g., counter)

RESET

controlled

switch

(e.g., CBT device)

VDD

enable

SUB-SYSTEM 3(1)

(e.g., alarm system)

ALARM

P0_4

P0_5

P0_6

10 DIGIT

NUMERIC

KEYPAD

VSS

002aag170

10 kΩ

2 kΩ

100 kΩ

(×3)

P0_7

P1_0

P1_1

P1_2

P1_3

P1_4

P1_5

P1_6

P1_7

RESET

10 kΩ

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