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ACT8934A датащи(PDF) 28 Page - Active-Semi, Inc |
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ACT8934A датащи(HTML) 28 Page - Active-Semi, Inc |
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28 / 45 page ![]() ACT8934A Rev 1, 22-Oct-12 Copyright © 2012 Active-Semi, Inc. Innovative Power TM ActivePMU TM and ActivePathTM are trademarks of Active-Semi. I 2CTM is a trademark of NXP. - 28 - www.active-semi.com nPBIN ACT8936 Manual Reset Push-Button nPBSTAT Manual Reset Detect Push- Button Detect To CPU VSYS OUT1 50kΩ ACT8934A Table 5: Control Pins PIN NAME OUTPUT nPBIN REG1, REG2, REG5 PWRHLD REG1, REG2, REG5 PWREN REG3, REG4 Table 4: ACT8934A and Samsung S3C2416/S3C2450 Signal Interface 1 : Optional connection for DVS control. 2 , : Typical connections shown, actual connections may vary. : Optional connection for power hold control. Control Signals Enable Inputs The ACT8934A features a variety of control inputs, which are used to enable and disable outputs depending upon the desired mode of operation. PWRHLD is a logic inputs, while nPBIN is a unique, multi-function input. Refer to Table 5 for a description of which channels are controlled by each input. nPBIN Multi-Function Input ACT8934A features the nPBIN multi-function pin, which combines system enable/disable control with a hardware reset function. Select either of the two pin functions by asserting this pin, either through a direct connection to GA, or through a 50kΩ resistor to GA, as shown in Figure 2. Warm/Cold Manual Reset Function The second major function of the nPBIN input is to provide warm and cold manual reset function. To manually reset the processor, drive nPBIN directly to GA through a low impedance (less than 2.5kΩ). An internal timer detects the duration of the manual reset event. Short Press/Warm Reset When the manual reset button is pressed for less than 130ms, ACT8934A commences a warm reset operation where nRSTO immediately asserts low, then remains asserted low until the manual reset button is released for 130ms. Long Press / Cold Reset (Power Cycle) When the manual reset button is pressed for more than 130ms, ACT8934A commences a power cycle routine in which case all regulators are turned off and then turned back on after reset button is released with all the registers reloaded to default values. When the ACT8934A turns on again, it stays enabled for 260ms, the PWRHLD need to be asserted during this time so that the system remains powered, otherwise the ACT8934A automatically shuts down. Figure 2: nPBIN Input ACT8934A DIRECTION SAMSUNG S3C2416/S3C2450 PWREN PWR_EN SCL IICSCL SDA IICSDA VSEL DVS_GPIO nRSTO nRESET nIRQ EINT0 nPBSTAT EINT1 nLBO nBATT_FLT PWRHLD Power hold GPIO : For ACT8934AQJ3XX and ACT8934AQJ4XX, asserting nPBIN or PWRHLD also enables REG6 and REG7. |
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