AD10242SLASHPCB datasheet(3/16 Pages) AD

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Test

Mil

AD10242BZ/TZ

Parameter

Temp

Level

Subgroup

Min

Typ

Max

Units

SPURIOUS-FREE DYNAMIC RANGE

Analog Input @ 1.2 MHz

+25

°C

dBFS

@ 4.85 MHz

+25

°C

dBFS

Full

5, 6

dBFS

@ 9.9 MHz

+25

°C

dBFS

Full

5, 6

dBFS

@ 19.5 MHz

+25

°C

dBFS

Full

5, 6

dBFS

TWO-TONE IMD REJECTION

F1, F2 @ –7 dBFS

Full

4, 5, 6

dBc

CHANNEL-TO-CHANNEL ISOLATION

+25

°CIV

TRANSIENT RESPONSE

+25

°CV

LINEARITY

Differential Nonlinearity

+25

°C

0.3

1.0

LSB

(Encode = 20 MHz)

Full

0.5

1.25

LSB

Integral Nonlinearity

+25

°C

0.3

LSB

(Encode = 20 MHz)

Full

0.5

LSB

OVERVOLTAGE RECOVERY TIME

VIN = 2.0 × FS

Full

100

VIN = 4.0 × FS

Full

200

DIGITAL OUTPUTS

Logic Compatibility

CMOS

Logic “1” Voltage

Full

1, 2, 3

3.5

4.2

Logic “0” Voltage

Full

1, 2, 3

0.45

0.65

Output Coding

Twos Complement

POWER SUPPLY

AVCC Supply Voltage

Full

+5.0

I (AVCC) Current

Full

260

AVEE Supply Voltage

Full

–5.0

I (AVEE) Current

Full

DVCC Supply Voltage

Full

+5.0

I (DVCC) Current

Full

ICC (Total) Supply Current

Full

1, 2, 3

350

400

Power Dissipation (Total)

Full

1, 2, 3

1.75

2.0

Power Supply Rejection Ratio (PSRR)

Full

7, 8

0.01

0.02

% FSR/% VS

Pass Band Ripple to 10 MHz

Full

0.2

NOTES

1 Gain tests are performed on A

IN3 over specified input voltage range.

2 Input capacitance specifications combines AD9631 die capacitance + ceramic package capacitance.

3 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.

4 ENCODE (Pin 4) driven by single-ended source; ENCODE (Pin 5) bypassed to ground through 0.01

µF capacitor.

5 ENCODE (Pin 4) may also be driven differentially in conjunction with ENCODE (Pin 5); see “Encoding the AD10242” for details.

6 Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50%

± 5%.

7 Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first 5 harmonics removed). Encode = 40.0 MSPS.

8 Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 40.0 MSPS.

9 Analog Input signal equal –1 dBFS; SFDR is ratio of converter full scale to worst spur.

10 Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the rati o of either tone to the worst 3rd order intermod product. f1 = 10.0 MHz

± 100 kHz, 50 kHz ≤ f1 – f2 ≤ 300 kHz.

11 Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel (AIN1).

12 Input driven to 2

× and 4× A

IN1 range for >4 clock cycles. Output recovers inband in specified time with Encode = 40 MSPS. No foldover guaranteed.

13 Outputs are sourcing 10

µA.

14 Outputs are sinking 10

µA.

All specifications guaranteed within 100 ms of initial power up regardless of sequencing.

Specifications subject to change without notice.

AD10242

–3–

REV. A

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