AD10242

–11–

REV. A

If a logic threshold other than the nominal 1.6 V is required,

the following equations show how to use an external resistor,

Ω,

R2 = 8 k

Ω).

R1R2

+ R1R

to lower logic threshold.

0.01µF

ENCODE

SOURCE

ENCODE

ENCODE

AD10242

+5V

R1

R2

Figure 21. Lower Threshold for Encode

5R2

R2

+

R1

+ R

X

to raise logic threshold.

0.01µF

ENCODE

SOURCE

ENCODE

ENCODE

AD10242

+5V

R1

R2

Figure 22. Raise Logic Threshold for Encode

While the single ended encode will work well for many applica-

tions, driving the encode differentially will provide increased

performance. Depending on circuit layout and system noise, a

1 dB to 3 dB improvement in SNR can be realized. It is recom-

mended that the encode signal be ac-coupled into the ENCODE

and

ENCODE pins.

The simplest option is shown below. The low jitter TTL signal

is coupled with a limiting resistor, typically 100

Ω, to the pri-

mary side of an RF transformer (these transformers are inexpen-

sive and readily available; Part No. in figure is from Mini-

Circuits). The secondary side is connected to the ENCODE

and

ENCODE pins of the converter. Since both encode inputs

are self-biased, no additional components are required.

TTL

ENCODE

ENCODE

AD10242

100

Ω

T1-1T

Figure 23. TTL Source—Differential Encode

If no TTL source is available, a clean sine wave may be substi-

tuted. In the case of the sine source, the matching network is

shown below. Since the matching transformer specified is a 1:1

impedance ratio, R, the load resistor should be selected to

match the source impedance. The input impedance of the

AD9042 is negligible in most cases.

ENCODE

ENCODE

AD10242

R

T1-1T

SINE

SOURCE

Figure 24. Sine Source—Differential Encode

If a low jitter ECL clock is available, another option is to ac-

couple a differential ECL signal to the encode input pins as

shown below. The capacitors shown here should be chip capaci-

tors but do not need to be of the low inductance variety.

ENCODE

ENCODE

AD10242

ECL

GATE

0.1µF

0.1µF

510

Ω

510

Ω

Figure 25. Differential ECL for Encode

As a final alternative, the ECL gate may be replaced by an ECL

comparator. The input to the comparator could then be a logic

signal or a sine signal.

ENCODE

ENCODE

AD10242

0.1µF

0.1µF

50

Ω

AD96687 (1/2)

510

Ω

510

Ω

Figure 26. ECL Comparator for Encode

Care should be taken not to overdrive the encode input pin

when ac coupled. Although the input circuitry is electrically pro-

tected from over or under voltage conditions, improper circuit

operations may result from overdriving the encode input pin.