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WM8973CLGEFL/V датащи(PDF) 37 Page - Wolfson Microelectronics plc

номер детали WM8973CLGEFL/V
подробное описание детали  Stereo CODEC for Portable Audio Applications
PDF  63 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
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WM8973CLGEFL/V датащи(HTML) 37 Page - Wolfson Microelectronics plc

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Production Data
WM8973L
w
PD, Rev 4.5, December 2011
37
ENABLING THE OUTPUTS
Each analogue output of the WM8973L can be separately enabled or disabled. The analogue mixer
associated with each output is powered on or off along with the output pin. All outputs are disabled by
default. To save power, unused outputs should remain disabled.
Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop
noise (see “Power Management” and “Applications Information” sections)
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R26 (1Ah)
Power
Management
(2)
6
LOUT1
0
LOUT1 Enable
5
ROUT1
0
ROUT1 Enable
4
LOUT2
0
LOUT2 Enable
3
ROUT2
0
ROUT2 Enable
2
MONO
0
MONOOUT Enable
1
OUT3
0
OUT3 Enable
Note: All “Enable” bits are 1 = ON, 0 = OFF
Table 29 Analogue Output Control
Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor.
This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and
each output can be controlled using the VROI bit in register 27. The default is low (1.5k
), so that any
capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for
disabled outputs, VROI can then be set to 1, increasing the resistance to about 40k
.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R27 (1Bh)
Additional (1)
6
VROI
0
VREF to analogue output resistance
0: 1.5 k
1: 40 k
Table 30 Disabled Outputs to VREF Resistance
HEADPHONE SWITCH
The RINPUT3/HPDETECT pin can be used as a headphone switch control input to automatically
disable the speaker output and enable the headphone output e.g. when a headphone is plugged into
a jack socket. In this mode, enabled by setting HPSWEN, HPDETECT switches between headphone
and speaker outputs (e.g. when the pin is connected to a mechanical switch in the headphone socket
to detect plug-in). The HPSWPOL bit reverses the pin’s polarity. Note that the LOUT1, ROUT1,
LOUT2 and ROUT2 bits in register 26 must also be set for headphone and speaker output (see Table
31 and Table 32).
Note:
When RINPUT3/HPDETECT is used as the HPDETECT input, the thresholds become CMOS levels
(0.3 AVDD / 0.7 AVDD).
HPSWEN
HPSWPOL HPDETECT
(PIN23)
L/ROUT1
(reg. 26)
L/ROUT2
(reg. 26)
Headphone
enabled
Speaker
enabled
0
X
X
0
0
no
no
0
X
X
0
1
no
yes
0
X
X
1
0
yes
no
0
X
X
1
1
yes
yes
1
0
0
X
0
no
no
1
0
0
X
1
no
yes
1
0
1
0
X
no
no
1
0
1
1
X
yes
no
1
1
0
0
X
no
no
1
1
0
1
X
yes
no
1
1
1
X
0
no
no
1
1
1
X
1
no
yes
Table 31 Headphone Switch Operation



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