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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8956CGEFL/V датащи(PDF) 21 Page - Wolfson Microelectronics plc |
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WM8956CGEFL/V датащи(HTML) 21 Page - Wolfson Microelectronics plc |
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21 / 80 page  Production Data WM8956 w PD, November 2011, Rev 4.1 21 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7 RINMUTE 1 Right Input PGA Analogue Mute 1 = Enable Mute 0 = Disable Mute Note: IPVU must be set to un-mute. 6 RIZC 0 Right Input PGA Zero Cross Detector 1 = Change gain on zero cross only 0 = Change gain immediately 5:0 RINVOL [5:0] 010111 ( 0dB ) Right Input PGA Volume Control 111111 = +30dB 111110 = +29.25dB . . 0.75dB steps down to 000000 = -17.25dB R23 (17h) Additional Control (1) 0 TOEN 0 Timeout Enable (Also enables jack detect debounce clock) 0 = Timeout disabled 1 = Timeout enabled 1 TOCLKSEL 0 Slow Clock Selection (Used for volume update timeouts and for jack detect debounce) 0 = SYSCLK / 2 21 (Slower Response) 1 = SYSCLK / 2 19 (Faster Response) Table 4 Input PGA Volume Control See "Volume Updates" for more information on volume update bits, zero cross and timeout operation. |
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