4256BWP datasheet(25/41 Pages) STMICROELECTRONICS

25 / 41 page

M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF

DC and AC parameters

Doc ID 6757 Rev 28

25/41

Table 10.

Input parameters

Symbol

Parameter(1)

Characterized only, not tested in production.

Test condition

Min.

Max.

Unit

CIN

Input capacitance (SDA)

CIN

Input capacitance (other pins)

Input impedance (E2, E1, E0, WC)(2)

E2, E1, E0 input impedance when the memory is selected (after a Start condition).

VIN < 0.3 VCC

VIN > 0.7 VCC

500

Table 11.

Cycling performance by groups of four bytes

Symbol

Parameter

Test condition(1)

Cycling performance for products identified by process letter KB.

Max.

Unit

Ncycle

Write cycle

endurance(2)

The Write cycle endurance is defined for groups of four data bytes located at addresses [4*N, 4*N+1,

4*N+2, 4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and

qualification.

≤ 25 °C, VCC(min) < VCC < VCC(max)

4,000,000

Write cycle(3)

A Write cycle is executed when either a Page Write, a Byte Write, a Write Identification Page or a Lock

Identification Page instruction is decoded. When using the Byte Write, the Page Write or the Write

Identification Page, refer also to Section 5.1.5: ECC (Error Correction Code) and Write cycling.

TA = 85 °C, VCC(min) < VCC < VCC(max)

1,200,000

Table 12.

Memory cell data retention

Parameter

Test condition

Min.

Unit

Data retention(1)

For products identified by process letter K. The data retention behavior is checked in production. The 200-

year limit is defined from characterization and qualification results.

TA = 55 °C

200

Year

4256BWP датащи(PDF) 25 Page - STMicroelectronics

4256BWP датащи(HTML) 25 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

датащи скачать

ссылки URL