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SPEAR1340 датащи(PDF) 198 Page - STMicroelectronics |
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SPEAR1340 датащи(HTML) 198 Page - STMicroelectronics |
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198 / 200 page ![]() Revision history SPEAr1340 198/200 Doc ID 023063 Rev 4 03-Aug-2012 2 (cont’d) Section 2.38: One-time programmable antifuse (OTP): updated Bank M description. Updated Section 2.6: Flexible static memory controller (FSMC). Section 2.4: Multiport DDR controller (MPMC): added a note at the first bullet referring to a limitation of maximum memory address space usage. Section 2.24: Camera input interfaces (CAM): added a note about feature capability. Section 2.37: Temperature sensor (THSENS): – Changed measurement of junction temperature starting value from 0 to 20 ° C. – Added typical correction value. Chapter 3: Pin description Updated the introduction. Table 3: Ball characteristics: – Modified the power supply for USB_UOC_ID from “USB_UOC_VDD3V3” to “USB_VDD2V5”. – Modified the power supply for USB_UOC_VBUS from “USB_UOC_VDD3V3” to “5V”. – Added a footnote about XGPIO169 Inserted description for SPDIF_IN and SPDIF_OUT in Table 27: Audio - S/PDIF signals description. Updated footnote under Figure 6: SPEAr1340 multiplexing scheme. Added a footnote to Table 16: Connectivity - PCIe/SATA physical interface (MIPHY) signals description. Updated STRAP5 description in Table 37: Strapping options. Added a footnote related to chip selection and booting in Table 11: Memories - FSMC signals description, Table 12: Memories - SMI signals description and Table 38: Hardware boot selection (STRAP[0..3]) Table 19: Connectivity - USB 2.0 PHY signals description: updated the description of USB_UOC_VBUS adding the phrase “The voltage range is 0-5.25 V”. Chapter 4: Electrical characteristics Added a reference to AN3317 Application note at the beginning of the chapter. Section 4.3: Clocking parameters: – Added Table 42: MCLK oscillator characteristics and new Section : MCLK generated from an external clock source. – Added Table 44: RTC oscillator characteristics and new Section : RTC clock generated from an external clock source. Changed I/O types from TTL1, TTL2, TTL3 and PCI/3V3 TTL to IOTYPE1, IOTYPE2, IOTYPE3 and IOTYPE4 (throughout document). Table 109. Document revision history (continued) Date Revision Changes |
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