SPEAR1340 datasheet(196/200 Pages) STMICROELECTRONICS

196 / 200 page

Revision history

SPEAr1340

196/200

Doc ID 023063 Rev 4

Revision history

Table 109.

Document revision history

Date

Revision

Changes

05-Apr-2012

Initial release.

03-Aug-2012

Features

– Added SD interface to bullet “1x memory card interface”.

– Changed the bullet related to LCD from “LCD display controller, up

to 1920 x 1200,60 Hz, 24 bpp” to “LCD display controller,

incl.support for Full HD, 1920 x 1080, 60 Hz, 24 bpp”.

– Added new sub-bullets “Secure boot support” and “JTAG disable

option” under “Security” security.

Chapter 6: Package information

Updated Table 107: PGBA (23 x 23 mm, 0.8 mm pitch) package

thermal characteristics:

– Changed

B value from 8.2 to 9 °C/W.

– Added

A and ΨJC values.

– Added footnote.

– Changed table title.

Chapter 2: Device functions

Section 2.14: UART ports:

– Deleted bullet “Support baud rate up to UARTCLK_max_freq/16”.

– Changed bullet “Programmable by software” to “Programmable by

software: up to 125 MHz with a maximum baud rate of 7.81 Mbps

(125/16).”

Section 2.17: A/D converter (ADC): Changed bullet : ”10-bit

resolution” to “10-bit resolution for the analog cell which can be

extended up to 17 bits with embedded oversampling techniques

performed by the controller”.

Section 2.24: Camera input interfaces (CAM): Changed the

numbering of CAMx from “CAM0, CAM1, CAM2 and CAM3” into

“CAM1, CAM2, CAM3 and CAM4”.

Section 2.23: Video encoder (VENC): updated the features.

Section 2.19: General purpose I/O (GPIO/XGPIO): Added

information about XGPIO169 in the first bullet of “XGPIO main

features” section.

Section 2.37: Temperature sensor (THSENS):

– Moved ‘offset-related’ bullet closer to ‘measurement range’ bullet

as they are related.

– Removed reference to “calibration” from the ‘offset-related’ bullet.

Section 2.2: Multilayer interconnect matrix (BUSMATRIX): Corrected

a typo error in “Single interrupt for outband signaling” bullet.

Section 2.3.1: BootROM: added SD/MMC to the list of booting

devices.

Section 2.1: CPU subsystem:

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