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SPC560P60L3 датащи(PDF) 50 Page - STMicroelectronics |
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SPC560P60L3 датащи(HTML) 50 Page - STMicroelectronics |
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50 / 104 page ![]() Electrical characteristics SPC56xP54x, SPC56xP60x 50/104 Doc ID 18340 Rev 3 Figure 5 shows the constraints of the different power supplies. Figure 5. Power supplies constraints The SPC56xP54/60 supply architecture provides an ADC supply that is managed independently of standard VDD_HV supply. Figure 6 shows the constraints of the ADC power supply. IINJSUM SR Absolute sum of all injected input currents during overload condition — –50 50 mA IVDD_LV SR Low voltage static current sink through VDD_LV —— 155 mA TSTG SR Storage temperature — –55 150 °C TJ SR Junction temperature under bias — –40 150 °C 1. Functional operating conditions are given in the DC electrical characteristics. Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect device reliability or cause permanent damage to the device. 2. Absolute maximum voltages are currently maximum burn-in voltages. Absolute maximum specifications for device stress have not yet been determined. 3. The difference between each couple of voltage supplies must be less than 300 mV, |VDD_HV_IOy – VDD_HV_IOx | < 300 mV. 4. Ensure a monotonic supply ramp starting at ground level 5. Guaranteed by device validation Table 9. Absolute maximum ratings(1) (continued) Symbol Parameter Conditions Min Max(2) Unit VDD_HV_xxx VDD_HV_IOx -0.3V 6.0V -0.3V 6.0V |
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