поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STULPI01A датащи(PDF) 15 Page - STMicroelectronics

номер детали STULPI01A
подробное описание детали  High-speed USB On-The-Go ULPI transceiver
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STULPI01A датащи(HTML) 15 Page - STMicroelectronics

Back Button STULPI01A_12 Datasheet HTML 11Page - STMicroelectronics STULPI01A_12 Datasheet HTML 12Page - STMicroelectronics STULPI01A_12 Datasheet HTML 13Page - STMicroelectronics STULPI01A_12 Datasheet HTML 14Page - STMicroelectronics STULPI01A_12 Datasheet HTML 15Page - STMicroelectronics STULPI01A_12 Datasheet HTML 16Page - STMicroelectronics STULPI01A_12 Datasheet HTML 17Page - STMicroelectronics STULPI01A_12 Datasheet HTML 18Page - STMicroelectronics STULPI01A_12 Datasheet HTML 19Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 44 page
background image
STULPI01A, STULPI01B
Electrical characteristics
Doc ID 14817 Rev 4
15/44
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
High-speed driver
tHSR
Data rise time
500
ps
tHSF
Data fall time
500
ps
Waveform requirements including
jitter
Specified by eye pattern
(Figure 3)
DRHS
High-speed data rate
479.76
480.24
Mb/s
ULPI interface
CLOCK (measured on CLK pin)
fSTART_U
Frequency (first transition)
(2)
54
60
66
MHz
fSTEADY_U
Frequency (steady-state)
59.97
60
60.03
MHz
DSTART_U
Duty cycle (first transition)
40
50
60
%
DSTEADY_U Duty cycle (steady-state)
(2)
45
50
55
%
TSTEADY_U
Time to reach steady-state
frequency and duty cycle after first
transition
(2)
1.4
ms
TJITTER_U
Jitter
400
ps
tSCLK60OUT Clock startup time
Measured from assertion
of STP during suspend, or
after release of RESETn
pin
250
900
µs
ULPI control signals (SDR mode)(2)
TSC_U
Control in setup time
CLOAD = 15 pF
VDVIO = 1.65 - 3.6 V
6.0
ns
THC_U
Control in hold time
0.0
ns
TDC_U
Control output delay
9.0
ns
ULPI data signals (SDR mode)(2)
TSD_U
Data in setup time
CLOAD = 15 pF
VDVIO = 1.65 - 3.6 V
6.0
ns
THD_U
Data in hold time
3.0
ns
TDD_U
Data output delay
9.0
ns
1.
Over recommended operating conditions unless otherwise noted. All the typical values are referred to TA = 25 °C,
VDVIO = 1.8 V, VBAT = 3.6 V, CT = 4.7 µF.
2.
Guaranteed by design.
Table 7.
Switching characteristics (continued)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com