L6360 datasheet(18/65 Pages) STMICROELECTRONICS

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Device configuration

L6360

18/65

Doc ID 022817 Rev 2

Device configuration

SDA and SCL configure the L6360 device through I2C.

6.1

I²C single master bus interface

6.1.1

Introduction

The I2C bus interface serves as an interface between the microcontroller and the serial I2C

bus.

It provides single master functions, and controls all I2C bus-specific sequencing, protocol

and timing.

It supports fast I2C mode (400 kHz).

6.1.2

Main features

●

Parallel bus / I2C protocol converter

●

Interrupt generation

●

Fast I2C mode

●

7-bit addressing.

6.1.3

General description

In addition to receiving and transmitting data, this interface converts it from serial to parallel

format and vice versa.

The interface is connected to the I2C bus by a data pin (SDA) and a clock pin (SCL).

6.1.4

SDA/SCL line control

SDA is a bi-directional line, SCL is the clock input. SDA should be connected to a positive

supply voltage via a current-source or pull-up resistor. When the bus is free, both lines are

HIGH.

The output stages of devices connected to the bus must have an open drain or open

collector output to perform the wired AND function. Data on the I2C bus can be transferred

at rates up to 400 Kbit/s in fast mode.

The number of interfaces connected to the bus is limited by the bus capacitance.

For a single master application, the master's SCL output can be a push-pull driver provided

that there are no devices on the bus which would stretch the clock.

Transmitter mode: the microcontroller interface holds the clock line low before transmission.

Receiver mode: the microcontroller interface holds the clock line low after reception.

When the I2C microcontroller cell is enabled, the SDA and SCL ports must be configured as

floating inputs.

In this case, the value of the external pull-up resistors used depends on the application.

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