SST58SD024 datasheet(8/40 Pages) SST

8 / 40 page

Data Sheet

ATA-Disk Chip

SST58SD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

SST58LD008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192

S71167-05-000

9/01

391

TABLE

2-2: SIGNAL DESCRIPTION

Symbol

Type1

Name and Functions

A2 - A0

13,14,19

A[2:0] are used to select the one of eight registers in the Task File.

D15 - D0

I/O

9,8,7,6,5,4,3,2,

31,30,29,28,27,

26,25,24

Data bus

CS1FX#, CS3FX#

15,18

CS1FX# is the chip select for the task file registers while CS3FX# is used to

select the Alternate Status Register and the Device Control Register.

CSEL

This internally pulled-up signal is used to configure this device as a Master

or a Slave. When this pin is grounded, this device is configured as a Master.

When the pin is open, this device is configured as a Slave.

IORD#

This is an I/O Read strobe generated by the host. This signal gates I/O data

onto the bus from the chip.

IOWR#

The I/O Write strobe pulse is used to clock I/O data into the chip.

IOCS16#

This output signal is asserted low when this device is expecting a word data

transfer cycle.

WP#

Write protect pin is used to disable Write operation. When this pin is low,

data on chip will be write protected.

INTRQ

Signal is the active high Interrupt Request to the host.

PDIAG#

I/O

This input/output is the Pass Diagnostic signal in the Master/Slave

handshake protocol.

DASP#

I/O

This input/output is the Disk Active/Slave present signal in the Master/Slave

handshake protocol.

RESET#

This input pin is the active low hardware reset from the host.

GND

Ground

VDD

-32

Power

T2-2.3 391

1. Please refer to Sections 2.3.1 to 2.3.4 for detail

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