14

Data Sheet

2 Mbit Flash + 1 Mbit SRAM ComboMemory

SST31LF021 / SST31LF021E

©2001 Silicon Storage Technology, Inc.

S71137-03-000

10/01 392

392 ILL F07.0

ADDRESS A17-0

DQ6

WE#

OE#

BEF#

TOE

TOEH

TBE

TOES

TWO READ CYCLES

WITH SAME OUTPUTS

BES#

392 ILL F08.1

ADDRESS A17-0

DQ7-0

WE#

SW0

Note: The device also supports BEF# controlled Sector-Erase operation. The WE# and BEF#

signals are interchangeable as long as minimum timings are met. (See Table 12)

SAX = Sector Address

SW1

SW2

SW3

SW4

SW5

5555

2AAA

2AAA

5555

5555

55

30

55

AA

80

AA

SAX

OE#

BEF#

SIX-BYTE CODE FOR SECTOR-ERASE

TSE

TWP

BES#