TAS5721 datasheet(13/71 Pages) TI1

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TAS5721

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SLOS739 – JULY 2012

Headphone Amplifier and Line Driver Characteristics

TA = 25°C, PVDD = 18 V, AVDD = DRVDD = DVDD = 3.3 V, audio input signal =1 kHz sine wave, BTL, AD mode, fS = 48

kHz, RSPK = 8 Ω, AES17 filter, fPWM = 384 kHz, external components per Typical Application Circuit diagrams, and in

accordance with recommended operating conditions (unless otherwise specified).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

PoHP

Power output per channel of

DRVDD = 3.3 V (RHP = 32; THD = 1%)

headphone amplifier

AVDR

Gain for headphone amplifier and line

Adjustable through Rin and Rfb

driver

SNRHP

Signal-to-noise ratio (headphone mode) Rhp = 32

101

SNRLD

Signal-to-noise ratio (line driver mode)

2-VRMS output

105

Protection Characteristics

TA = 25°C, PVDD = 18 V, AVDD = DRVDD = DVDD = 3.3 V, audio input signal =1 kHz sine wave, BTL, AD mode, fS = 48

kHz, RSPK = 8 Ω, AES17 filter, fPWM = 384 kHz, external components per Typical Application Circuit diagrams, and in

accordance with recommended operating conditions (unless otherwise specified).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Vuvp(fall)

Undervoltage protection limit

PVDD falling

Vuvp(rise)

Undervoltage protection limit

PVDD rising

4.1

OTE

Overtemperature error threshold

150

°C

ΔOTE

Variation in overtemperature detection circuit

±15

°C

IOCE

Overcurrent limit protection threshold

3.0

tOCE

Overcurrent response time

150

THERMAL CHARACTERISTICS

TAS5721

THERMAL METRIC(1)

DCA

UNITS

48 PINS

θJA

Junction-to-ambient thermal resistance(2)

27.9

θJCtop

Junction-to-case (top) thermal resistance(3)

20.7

θJB

Junction-to-board thermal resistance(4)

°C/W

ψJT

Junction-to-top characterization parameter(5)

0.3

ψJB

Junction-to-board characterization parameter(6)

6.7

θJCbot

Junction-to-case (bottom) thermal resistance(7)

1.1

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining

θJA , using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

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