DLPR100 datasheet(8/15 Pages) TI1

8 / 15 page

tVSL

read instruction allowed

reset

state

Device fully accessible

CS must track VCC

Program, erase, and write functions ignored

VCC(max)

VCC(min)

VWI

VCC

time

tPUW

DLPR100

DLPS020 – DECEMBER 2009

www.ti.com

Figure 3. Power-Up Timing and Voltage Levels

DC ELECTRICAL CHARACTERISTICS

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

CIN

Input capacitance(1)

VIN = 0 V

Cout

Output capacitance(1)

VOUT = 0 V

ILI

Input leakage

±2

µA

ILO

I/O leakage

±2

µA

ICC1

Standby current

CS = VCC, VIN = GND or VCC

µA

ICC2

Power-down current

CS = VCC, VIN = GND or VCC

µA

ICC3

Current read data/dual output

C = 0.1 VCC/0.9 VCC DO =

1 MHz

5/6

7/8

read(2)

open

33 MHz

7/8

11/12

50 MHz

9/10

13/15

75 MHz

11/12

16/18

ICC4

Current page program

CS = VCC

ICC5

Current Write Status Register

CS = VCC

ICC6

Current sector/block erase

CS = VCC

ICC7

Current chip erase

CS = VCC

VIL

Low-level input voltage

–0.5

VCC x 0.3

VIH

High-level input voltage

VCC x 0.7

VCC + 0.4

VOL

Low-level output voltage

IOL = 1.6 mA

0.4

VOH

High-level output voltage

IOH = –100 µA

VCC - 0.7

(1)

Tested on sample basis and specified through design and characterization data TA= 25°C, VCC = 3.0 V

(2)

Checker board pattern

AC ELECTRICAL CHARACTERISTICS

VCC = 2.3 V to 3.6 V unless otherwise specified

SYMBOL

ALT

DESCRIPTION

MIN

TYP

MAX

UNIT

Clock frequency for all instructions, except read data(03h) 2.3–3.6

MHz

V VCC

Clock frequency for all instructions, except read data(03h) 2.7–3.6

MHz

V VCC

Clock frequency read data(03h)

MHz

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