LTC4271 datasheet(6/30 Pages) LINER

6 / 30 page

LTC4274A/LTC4274C

4274acfc

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I2C Timing

Clock Frequency

(Note 7)

MHz

Bus Free Time

Figure 5 (Notes 7, 9)

480

Start Hold Time

Figure 5 (Notes 7, 9)

240

SCL Low Time

Figure 5 (Notes 7, 9)

480

SCL High Time

Figure 5 (Notes 7, 9)

240

Data Hold Time

Figure 5 (Notes 7, 9) Data into Chip

Data Out of Chip

120

Data Set-Up Time

Figure 5 (Notes 7, 9)

Start Set-Up Time

Figure 5 (Notes 7, 9)

240

Stop Set-Up Time

Figure 5 (Notes 7, 9)

240

SCL, SDAIN Rise Time

Figure 5 (Notes 7, 9)

120

SCL, SDAIN Fall Time

Figure 5 (Notes 7, 9)

Fault Present to INT Pin Low

(Notes 7, 9, 10)

150

Stop Condition to INT Pin Low

(Notes 7, 9, 10)

1.5

μs

ARA to INT Pin High Time

(Notes 7, 9)

1.5

μs

SCL Fall to ACK Low

(Notes 7, 9)

120

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 140°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

Note 3: All currents into device pins are positive; all currents out of device

pins are negative.

Note 4: The LTC4274A/LTC4274C operates with a negative supply voltage

(with respect to ground). To avoid confusion, voltages in this data sheet

are referred to in terms of absolute magnitude.

Note 5: tDIS is the same as tMPDO defined by IEEE 802.3at.

Note 6: The LTC4274A/LTC4274C digital interface operates with respect to

DGND. All logic levels are measured with respect to DGND.

Note 7: Guaranteed by design, not subject to test.

Note 8: The IEEE 802.3af specification allows a PD to present its

Maintain Power Signature (MPS) on an intermittent basis without being

disconnected. In order to stay powered, the PD must present the MPS for

tMPS within any tMPDO time window.

Note 9: Values measured at VILD(MAX) and VIHD(MIN).

Note 10: If fault condition occurs during an I2C transaction, the INT pin

will not be pulled down until a stop condition is present on the I2C bus.

Note 11: Load Characteristic of the LTC4274A/LTC4274C during Mark:

7V < (AGND – VOUT) < 10V or IOUT < 50μA

Note 12: See the LTC4274A/LTC4274C Software Programming

documentation for information on serial bus usage and device

configuration and status registers.

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. AGND – VEE = 54V, AGND = DGND, and VDD – DGND = 3.3V unless

otherwise noted. (Notes 3, 4)

LTC4271 датащи(PDF) 6 Page - Linear Technology

LTC4271 датащи(HTML) 6 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

датащи скачать

ссылки URL