35

2270f

LTC2270

PACKAGE DESCRIPTION

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

9 .00 ±0.10

(4 SIDES)

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION WNJR-5

2. ALL DIMENSIONS ARE IN MILLIMETERS

3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT

4. EXPOSED PAD SHALL BE SOLDER PLATED

5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

6. DRAWING NOT TO SCALE

PIN 1 TOP MARK

(SEE NOTE 5)

0.40 ±0.10

64

63

1

2

BOTTOM VIEW—EXPOSED PAD

7.15 ±0.10

7.15 ±0.10

7.50 REF

(4-SIDES)

0.75 ±0.05

R = 0.10

TYP

R = 0.115

TYP

0.25 ±0.05

0.50 BSC

0.200 REF

0.00 – 0.05

(UP64) QFN 0406 REV C

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

0.70 ±0.05

7.50 REF

(4 SIDES)

7.15 ±0.05

7.15 ±0.05

8.10 ±0.05 9.50 ±0.05

0.25 ±0.05

0.50 BSC

PACKAGE OUTLINE

PIN 1

CHAMFER

C = 0.35

UP Package

64-Lead Plastic QFN (9mm

9mm)

(Reference LTC DWG # 05-08-1705 Rev C)