DAC5674

SLWS148A − SEPTEMBER 2003 − REVISED OCTOBER 2005

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DETAILED DESCRIPTION

Figure 1 shows a simplified block diagram of the DAC5674. The CMOS device consists of a segmented array

of PMOS current sources, capable of delivering a full-scale output current up to 20 mA. Differential current

switches direct the current of each current source to either one of the complementary output nodes IOUT1 or

IOUT2. The complementary output currents thus enable differential operation, canceling out common mode

noise sources (digital feedthrough, on-chip, and PCB noise), dc offsets, even-order distortion components, and

increase signal output power by a factor of two.

from 20 mA down to 2 mA.

Interpolation Filter

The interpolation filters FIR1 and FIR2 can be configured for either low-pass or high-pass response. In this way,

higher order images can be selected. Table 1 shows the DAC IF output range for the different filter response

combinations, for both the first and second Nyquist zone (after interpolation). Table 2 lists the DAC IF output

ranges for two popular GSM data rates. Table 3 shows the W-CDMA IF carrier center frequency for an input

data rate of 61.44 MSPS and a fundamental input IF of 15.36 MHz. Figure 15 shows the spectral response;

the corresponding nonzero tap weights are:

f / fin

−150

−100

−50

0

0.0

0.2

0.4

0.6

0.8

1.0

AMPLITUDE

vs

FREQUENCY

f / fin

0.0

0.2

0.4

0.6

0.8

1.0

0.005

AMPLITUDE

vs

FREQUENCY

−0.005

0.000

Figure 15. FIR1 and FIR2 Magnitude Spectrum