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THS6204IPWPR датащи(PDF) 4 Page - Texas Instruments

номер детали THS6204IPWPR
подробное описание детали  Dual-Port, Differential VDSL2 Line Driver Amplifiers
PDF  43 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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THS6204IPWPR датащи(HTML) 4 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS: VS = ±12V
THS6204
SBOS416C – OCTOBER 2007 – REVISED APRIL 2009 ................................................................................................................................................... www.ti.com
At TA = +25°C, RF = 1.24kΩ, RL = 100Ω differential, GDiff = 10V/V differential, GCM = 1V/V common-mode, and full bias, unless
otherwise noted. Each port is independently tested.
THS6204IRHF, IPWP
TYP
OVER TEMPERATURE
0°C to
–40°C to
MIN/
TEST
PARAMETER
CONDITIONS
+25°C
+25°C(2)
+70°C(3)
+85°C(3)
UNITS
MAX
LEVEL(1)
AC PERFORMANCE
GDIFF = 5V/V differential, RF = 1.5kΩ,
160
MHz
Typ
C
VO = 2VPP
Small-signal bandwidth,
–3dB (VO = 2VPP)
GDIFF = 10V/V differential,
150
120
110
100
MHz
Min
B
RF = 1.24kΩ, VO = 2VPP
GDIFF = 10V/V differential,
0.1dB bandwidth flatness
114
MHz
Typ
C
RF = 1.24kΩ
GDIFF = 10V/V differential,
Large-signal bandwidth
120
MHz
Typ
C
VO = 20VPP
GDIFF = 10V/V, VO = 20V step,
Slew rate (10% to 90% level)
3800
3200
3100
3000
V/
µs
Min
B
differential
Rise and fall time
GDIFF = +5V/V, VO = 2VPP, differential
5
ns
Typ
C
Harmonic distortion
Full bias
–100
–95
–92
–90
dBc
Min
B
2nd harmonic
GDIFF = 10V/V,
Low bias
–96
dBc
Typ
C
VO = 2VPP,
Full bias
–89
–85
–82
–80
dBc
Min
B
f = 1MHz, RL = 100Ω
3rd harmonic
Low bias
–85
dBc
Typ
C
Full bias
–75
–70
–68
–65
dBc
Min
B
2nd harmonic
GDIFF = 10V/V,
Low bias
–72
dBc
Typ
C
VO = 2VPP,
f = 10MHz,
Full bias
–73
–65
–61
–53
dBc
Min
B
RL = 100Ω
3rd harmonic
Low bias
–58
dBc
Typ
C
VDSL2 8b profile +20.5dBm
–70
dBc
Typ
C
Multi-tone power ratio (MTPR)
VDSL2 17a profile +14.5dBm;
G
≈ 11, active termination, SF ≈ 4.
–65
dBc
Typ
C
power supply = ±7.5V
Differential input voltage noise
f = 1MHz
2.5
3.0
3.2
3.3
nV/
√Hz
Max
B
Differential inverting current noise
f = 1MHz
17
20
22
24
pA/
√Hz
Max
B
Differential noninverting current noise
f = 1MHz
1.2
1.4
1.5
1.6
pA/
√Hz
Max
B
DC PERFORMANCE
Open-loop transimpedance gain
RL = 100Ω
700
330
320
300
k
Ω
Typ
A
Input offset voltage
±15
±50
±55
±60
mV
Max
A
Input offset voltage drift
±110
±155
µV/°C
Max
B
Input offset voltage matching
Channels 1 to 2 and 3 to 4 only
±0.5
±5
±6
±7
mV
Max
A
Noninverting input bias current
±1
±3
±4
±5
µA
Max
A
Noninverting input bias current drift
±25
±30
nA/°C
Max
B
Inverting input bias current
±8
±40
±45
±50
µA
Max
A
Inverting input bias current drift
±115
±135
nA/°C
Max
B
Inverting input bias current matching
±8
±25
±30
±35
µA
Max
A
INPUT CHARACTERISTICS
Common-mode input range
Each amplifier
±9.5
±9
±8.8
±8.6
V
Min
A
Common-mode rejection ratio
Each amplifier
65
53
50
49
dB
Min
A
Noninverting input resistance
500 || 2
k
Ω || pF
Typ
C
Inverting input resistance
50
Ω
Typ
C
(1)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2)
Junction temperature = ambient for +25°C tested specifications.
(3)
Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over
temperature specifications.
4
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Product Folder Link(s): THS6204



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