SP791 datasheet(15/19 Pages) SIPEX

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SP791DS/08

SP791 Low Power Microprocessor Supervisory with Battery Switch-Over

Leakage current through the capacitor charging

diode and the SP791 internal power diode even-

tually discharges the capacitor to VCC. Also, if

VCC and VBATT start from 0.5V above the reset

threshold and power is lost at VCC, the capacitor

on VBATT discharges through VCC until VBATT

reaches the reset threshold; the SP791 then

switches to battery-backup mode.

USING SEPARATE POWER SUPPLIES

FOR VBATT AND VCC

If using separate power supplies for VCC and

VBATT, VBATT must be less than 0.3V above VCC

when VCC is above the reset threshold. As

described in the previous section, if VBATT ex-

ceeds this limit and power is lost at VCC, current

flows continuously from VBATT to VCC via the

VBATT-to-VOUT diode and the VOUT-to-VCC

switch until the circuit is broken.

ALTERNATIVE CHIP-ENABLE GATING

Using memory devices with CE and CE inputs

allows the SP791 CE loop to be bypassed. To do

this, connect CE IN to ground, pull up CE OUT

to VOUT, and connect CE OUT to the CE input

of each memory device as shown in Figure 13.

The CE input of each part then connects directly

to the chip-select logic, which does not have to

be gated by the SP791.

ADDING HYSTERESIS TO THE

POWER-FAIL COMPARATOR

Hysteresis adds a noise margin to the power-fail

comparator and prevents repeated triggering of

PFO when VIN is near the trip point. Figure 14

shows how to add hysteresis to the power-fail

comparator. Select the ratio of R1 to R2 such

that PFI sees 1.25V when VIN falls to the de-

sired trip point (VTRIP). Resistor R3 adds hys-

teresis. It will typically be an order of magni-

tude greater than R1 or R2. The current through

R1 and R2 should be at least 1

µA to ensure that

the 25nA (max) PFI input current does not shift

the trip point. R3 should be larger than 10k

Ω to

prevent it from loading down the PFO pin. Ca-

pacitor C1 adds additional noise rejection.

MONITORING A NEGATIVE VOLTAGE

The power-fail comparator can be used to moni-

tor a negative supply voltage using the circuit

shown in Figure 15. When the negative supply

is valid, PFO is low. When the negative supply

voltage drops, PFO goes high. This circuit's ac-

curacy is affected by the PFI threshold tolerance,

the VCC voltage, and resistors R1 and R2.

BACKUP-BATTERY REPLACEMENT

The backup battery may be disconnected while

VCC is above the reset threshold. No precautions

are necessary to avoid spurious reset pulses.

Figure 14. Adding Hysteresis to the Power-Fail Comparator

Figure 13. Alternate CE Gating

Corporation

CE IN

CE OUT

VOUT

GND

* MAXIMUM Rp VALUE DEPENDS ON

THE NUMBER OF RAM DEVICES.

MINIMUM Rp VALUE IS 1K

Ω

ACTIVE-HIGH CE

LINES FROM LOGIC

RAM 1

RAM 2

RAM 3

RAM 4

VIN

C1*

+5V

PFI

PFO

GND

µP

+5V

PFO

* OPTIONAL FOR ADDITIONAL

NOISE REJECTION

VLVTRIPVH

R1 + R2

(

)

R2 II R3

R1 + R2 II R3

(

) VL - 1.25 5 - 1.25 1.25

Corporation

Vcc

VH = 1.25

VTRIP = 1.25 *

VIN

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