LTC4253 datasheet(13/36 Pages) LINER

13 / 36 page

LTC4252-1/LTC4252-2

LTC4252A-1/LTC4252A-2

425212fd

OPERATION

Two modes of operation are possible during the time the

MOSFET is first turning on, depending on the values of

external components, MOSFET characteristics and nominal

design current. One possibility is that the MOSFET will turn

on gradually so that the inrush into the load capacitance

remains a low value. The output will simply ramp to –48V

and the LTC4252 will fully enhance the MOSFET. A second

possibility is that the load current exceeds the soft-start

current limit threshold of [VSS(t)/20 – VOS]/RS. In this case

the LTC4252 will ramp the output by sourcing soft-start

limited current into the load capacitance. If the soft-start

voltage is below 1.2V, the circuit breaker TIMER is held

low. Above 1.2V, TIMER ramps up. It is important to set

the timer delay so that, regardless of which start-up mode

is used, the TIMER ramp is less than one circuit breaker

delay time. If this condition is not met, the LTC4252-1 may

shut down after one circuit breaker delay time whereas

the LTC4252-2 may continue to autoretry.

Board Removal

If the board is withdrawn from the card cage, the UV and

OV divider is the first to lose connection. This shuts off

the MOSFET and commutates the flow of current in the

connector. When the power pins subsequently separate,

there is no arcing.

Current Control

Three levels of protection handle short-circuit and over-

load conditions. Load current is monitored by SENSE and

resistor RS. There are three distinct thresholds at SENSE:

50mV for a timed circuit breaker function; 100mV for an

analog current limit loop (60mV for the LTC4252A); and

200mV for a fast, feedforward comparator which limits

peak current in the event of a catastrophic short-circuit.

If, owing to an output overload, the voltage drop across RS

exceeds 50mV, TIMER sources 230μA into CT.CTeventually

charges to a 4V threshold and the LTC4252 shuts off. If

the overload goes away before CT reaches 4V and SENSE

measures less than 50mV, CT slowly discharges (5.8μA). In

this way the LTC4252’s circuit breaker function responds

to low duty cycle overloads and accounts for fast heating

and slow cooling characteristics of the MOSFET.

Higher overloads are handled by an analog current limit

loop.IfthedropacrossRSreachesVACL,thecurrentlimiting

loop servos the MOSFET gate and maintains a constant

output current of VACL/RS. In current limit mode, VOUT

typically rises and this increases MOSFET heating. If VOUT>

VDRNCL, connecting an external resistor, RD, between VOUT

and DRAIN allows the fault timing cycle to be shortened

by accelerating the charging of the TIMER capacitor. The

TIMER pull-up current is increased by 8 • IDRN. Note that

because SENSE > 50mV, TIMER charges CT during this

time and the LTC4252 will eventually shut down.

Low impedance failures on the load side of the LTC4252

coupled with 48V or more driving potential can produce

current slew rates well in excess of 50A/μs. Under these

conditions, overshoot is inevitable. A fast SENSE com-

parator with a threshold of 200mV detects overshoot and

pulls GATE low much harder and hence much faster than

the weaker current limit loop. The VACL/RS current limit

loop then takes over and servos the current as previously

described. As before, TIMER runs and shuts down the

LTC4252 when CT reaches 4V.

If CT reaches 4V, the LTC4252-1 latches off with a 5.8μA

pull-up current source whereas the LTC4252-2 starts a

shutdown cooling cycle. The LTC4252-1 circuit breaker

latch is reset by either pulling UV momentarily low or

dropping the input voltage VIN below the internal UVLO

threshold or pulling TIMER momentarily low with a switch.

The LTC4252-2 retries after its shutdown cooling cycle.

Although short-circuits are the most obvious fault type,

several operating conditions may invoke overcurrent

protection. Noise spikes from the backplane or load, input

steps caused by the connection of a second, higher voltage

supply, transient currents caused by faults on adjacent

circuit boards sharing the same power bus or the inser-

tion of non-hot-swappable products could cause higher

than anticipated input current and temporary detection

of an overcurrent condition. The action of TIMER and CT

rejects these events allowing the LTC4252 to “ride out”

temporary overloads and disturbances that could trip a

simple current comparator and, in some cases, blow a fuse.

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