DM9621 datasheet(29/66 Pages) DAVICOM

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DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

6.1 Basic Mode Control Register (BMCR) – 00H

Bit

Bit Name

Default

Description

Reset

0, RW/SC

Reset:

1=Software reset

0=Normal operation

This bit sets the status and controls the PHY registers to their

default states. This bit, which is self-clearing, will keep returning a

value of one until the reset process is completed

Loopback

0, RW

Loopback:

Loop-back control register

1 = Loop-back enabled

0 = Normal operation

When in 100Mbps operation mode, setting this bit may cause the

descrambler to lose synchronization and produce a 1300ms "dead

time" before any valid data appear at the MII receive outputs

Speed selection

1, RW

Speed select:

1 = 100Mbps

0 = 10Mbps

Link speed may be selected either by this bit or by auto-negotiation.

When auto-negotiation is enabled and bit 12 is set, this bit will return

auto-negotiation selected media type.

Auto-negotiation

enable

1, RW

Auto-negotiation enable:

1 = Auto-negotiation is enabled, bit 8 and 13 will be in

auto-negotiation status

Power down

0, RW

Power Down:

While in the power-down state, the PHY should respond to

management transactions. During the transition to power-down

state and while in the power-down state, the PHY should not

generate spurious signals on the MII.

1=Power down

0=Normal operation

Isolate

0,RW

Isolate:

1 = Isolates (Reserved)

0 = Normal operation

Restart

auto-negotiation

0,RW/SC

Restart auto-negotiation:

1 = Restart auto-negotiation. Re-initiates the auto-negotiation

process. When auto-negotiation is disabled (bit 12 of this register

cleared), this bit has no function and it should be cleared. This bit is

self-clearing and it will keep returning a value of 1 until

auto-negotiation is initiated by the PHY. The operation of the

auto-negotiation process will not be affected by the management

entity that clears this bit

0 = Normal operation

Duplex mode

1,RW

Duplex mode:

1 = Full duplex operation. Duplex selection is allowed when

Auto-negotiation is disabled (bit 12 of this register is cleared). With

auto-negotiation enabled, this bit reflects the duplex capability

selected by auto-negotiation

0 = Normal operation

Collision test

0,RW

Collision test:

1 = Collision test enabled. When set, this bit will cause the COL

signal to be asserted in response to the assertion of TX_EN

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