ADP1879ACPZ-1.0-R7 datasheet(36/40 Pages) AD

36 / 40 page

ADP1878/ADP1879

Data Sheet

Rev. A | Page 36 of 40

Figure 91. Primary Current Pathways During the On State of the High-Side

MOSFET (Left Arrow) and the On State of the Low-Side MOSFET (Right Arrow)

DIFFERENTIAL SENSING

Because the ADP1878/ADP1879 operate in valley current-mode

control, a differential voltage reading is taken across the drain

and source of the low-side MOSFET. Connect the drain of the

low-side MOSFET s as close as possible to the SW pin (Pin 13) of

the IC. Likewise, connect the source as close as possible to the

PGND pin (Pin 11) of the IC. When possible, keep both of

these track lines narrow and away from any other active device

or voltage/current path.

Figure 92. Drain/Source Tracking Tapping of the Low-Side MOSFET for CS

Amp Differential Sensing (Yellow Sense Line on Layer 2)

In addition, employ differential sensing between the outermost

output capacitor and the feedback resistor divider (see Figure 89

and Figure 90). Connect the positive terminal of the output

capacitor to the top resistor (RT). Connect the negative terminal

of the output capacitor to the negative terminal of the bottom

resistor, which connects to the analog ground plane as well.

Keep both of these track lines, as previously mentioned, narrow

and away from any other active device or voltage/ current path.

LAYER 1: SENSE LINE FOR SW

(DRAIN OF LOWER MOSFET)

LAYER 1: SENSE LINE FOR PGND

(SOURCE OF LOWER MOSFET)

PGND

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