epc700/epc702

Programming

ming to specific requirements, i.e., if a capacitive load has to be operated or an external transistor allows other values. The default value is

50μs which allows to charge a load capacitor of approx. 100 – 500nF without an external power transistor, dependent on the source impe -

ful because no operator interaction is necessary after a short circuit to enable normal function once the short circuit has been eliminated. The

default value is 500ms which means that the device tries to turn the output on after 0.5s waiting time in the short circuit mode. This waiting

It is to note that the parameters programmed are stored in a non-volatile random access memory. Thus, the parameters can be lost after a

power down for longer than 5ms (data retention time @ 25ºC: min. 100ms). The corresponding requirements for safety applications have to

take in consideration. Parameters can be changed as many times as necessary and even under operation to change the behavior of an

output. During power-on, the default values are restored automatically.

Programming Interface

The interface to store changed parameters are the pins IN and STATUS. IN is the chip select pin and STATUS, which is under normal opera -

tion an output, is used as an input pin. As long as the IN pin is at low state, parameters can be stored through the STATUS pin. Since IN is low

during the programming of new parameters, OUT is low as well.

The digital input high threshold is typically at 2.2V, thus a 5V compatible communication. Please note that the voltage at STATUS should not

exceed 5.5V.

Single Wire Communication Interface

The epc70x is based on a single wire communication interface by using the STATUS pin. Programming is done by a 21-Bit Manchester code

according to IEEE 802.4.

Clock

(internal)

1

0

0

1

1

0 0

Data

Manchester

code

Figure 8: Manchester encoding sample

Figure 8 shows such a sample Manchester encoded data-stream. The clock and the corresponding data is used to generate the Manchester

data-stream. Each positive clock-edge in the Manchester encoded data (indicated with the up-arrow) corresponds to a 1 and each negative

clock-edge (indicated with the down-arrow) corresponds to a 0.

Data Clock Frequency Range

The communication frequency range has to be according to Table 1.

minimal

typical

maximum

Data clock

396kHz

450kHz

540kHz

Table 1: Frequency range for programming

Configuration Bit Stream for changing the delay time

In order to guarantee a reliable communication with the Manchester encoded bit stream on STATUS, some additional bits have been added to

the configuration bits. Table 2 shows the digital pattern for the delay time configuration and the recovery time configuration.

Bit #

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

1

0

1

1

0

0

0

0

0

1

1

1

1

0

D1

D2

D3

1

d1

d2

d3

1

0

1

1

0

0

0

0

1

0

0

0

1

0

O1

O2

O3

1

o1

o2

o3

Table 2: Configuration of the delay and the recovery time

© 2011 ESPROS Photonics Corporation

Characteristics subject to change without notice

7

Datasheet epc700_702 - V2.2

www.espros.ch