epc700/epc702

Recommended Operating Conditions

Maximum Power Dissipation

-0.3 to +36.0 V (Note 2)

100mW

-40°C to +85°C

+260°C

Humidity (non-condensing)

Min.

9.6

-40°

+5

Max.

30

+85°

+95

Units

V

C

%

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions indi-

cate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifica -

tions and test conditions, see Electrical Characteristics.

Note 2: Supply voltages up to 36 Volts may be present for 10 seconds only.

Note 3: This device is a highly sensitive CMOS amplifier with an ESD rating of JEDEC HBM class 1C (>1kV). Handling and assembly of this

device should only be done at ESD protected workstations.

Electrical Characteristics

Symbol

Parameter

Conditions/Comments

Values

Units

Min.

Typ.

Max.

Supply Voltage

9.6

30

V

Ripple on Supply Voltage

Peak-Peak

10

Supply Current

no load

300

400

μA

Output Voltage

0

30

V

Output Saturation Voltage

@50mA output current

1

2

V

Sens Current

Current trigger threshold

-50

-60

-70

mA

Current Sens Voltage

Over-current trigger threshold voltage (by using an external

power switch)

0.18

0.2

0.25

V

Short Circuit Peak Current

Initial current during a short circuit (<1ms, 50Ω series resistor)

-0.5

A

Status Output

Logical high

2

5.5

V

Logical low

-0.3

0.8

Sink driving capability

-8

-10

-12

mA

Status Output Frequency

epc702 only, duty cycle 50%

1.5

1.7

1.9

Hz

Input

Logical high

2.0

5.5

V

Logical low

-0.3

0.8

Hysteresis

0.25

Pull-down resistance

100

150

200

kΩ

Power Dissipation

On-chip power dissipation

100

mW

Response Time

On

1.0

1.2

μs

Response Time

Off

0.7

1.0

μs

Off-delay Time

Time between over-current detection and STATUS/OUT

change (default value), refer to section Programming

40.0

50.0

60.0

μs

Programmable off-delay values

5/10/20/50/100/200/500/1,000

Recovery Time

Minimum down time of the OUT pin to protect the external

transistor (default value), refer to section Programming

400

500

600

ms

Programmable values

10/20/50/100/200/500/1,000/

1,500

Short circuit recovery delay

time factor

refer to section “Over-current Reset Sequence”)

1,000

Start-up time

VDD ramp > 100 V/ms

200

μs

External Load Capacitance Load capacitance that can be driven through OUT without

triggering over-current @2kOhm load and 5μs delay time

30

nF

© 2011 ESPROS Photonics Corporation

Characteristics subject to change without notice

2

Datasheet epc700_702 - V2.2

www.espros.ch