HT48R063B datasheet(23/84 Pages) HOLTEK

23 / 84 page

HT48R063B/064B/065B/066B

Rev. 1.00

April 7, 2011

Input/Output Ports and Control Registers

Within the area of Special Function Registers, the port

PA, PB, etc data I/O registers and their associated con-

trol register PAC, PBC, etc play a prominent role. These

registers are mapped to specific addresses within the

Data Memory as shown in the Data Memory table. The

data I/O registers, are used to transfer the appropriate

output or input data on the port. The control registers

specifies which pins of the port are set as inputs and

which are set as outputs. To setup a pin as an input, the

corresponding bit of the control register must be set

high, for an output it must be set low. During program in-

itialisation, it is important to first setup the control regis-

ters to specify which pins are outputs and which are

inputs before reading data from or writing data to the I/O

ports. One flexible feature of these registers is the ability

to directly program single bits using the

²SET [m].i² and

²CLR [m].i² instructions. The ability to change I/O pins

from output to input and vice versa by manipulating spe-

cific bits of the I/O control registers during normal pro-

gram operation is a useful feature of these devices.

System Control Registers

- CTRL0, CTRL1, CTRL2

These registers are used to provide control over various

internal functions. Some of these include the PFD con-

trol, PWM control, certain system clock options, the LXT

Oscillator low power control, external Interrupt edge trig-

ger type, Watchdog Timer enable function, Time Base

function division ratio, and the LXT oscillator enable

control.

· STATUS Register

Bit

76543210

Name

¾¾

PDF

R/W

¾¾

R/W

POR

¾¾

xxxx

²x² unknown

Bit 7, 6

Unimplemented, read as

²0²

Bit 5

TO: Watchdog Time-Out flag

0: After power up or executing the

²CLR WDT² or ²HALT² instruction

1: A watchdog time-out occurred.

Bit 4

PDF: Power down flag

0: After power up or executing the

²CLR WDT² instruction

1: By executing the

²HALT² instruction

Bit 3

OV: Overflow flag

0: no overflow

1: an operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit or vice versa.

Bit 2

Z: Zero flag

0: The result of an arithmetic or logical operation is not zero

1: The result of an arithmetic or logical operation is zero

Bit 1

AC: Auxiliary flag

0: no auxiliary carry

1: an operation results in a carry out of the low nibbles in addition, or no borrow from the

high nibble into the low nibble in subtraction

Bit 0

C: Carry flag

0: no carry-out

1: an operation results in a carry during an addition operation or if a borrow does not take place

during a subtraction operation

C is also affected by a rotate through carry instruction.

· CTRL0 Register

¨ HT48R063B/HT48R064B/HT48R065B

Bit

76543210

Name

¾¾¾¾

PFDEN1

PFDEN0

LXTLP

CLKMOD

R/W

¾¾¾¾

R/W

POR

¾¾¾¾

0000

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