GS9062-CFE3 datasheet(22/46 Pages) GENNUM

22 / 46 page

GS9062 Data Sheet

22209 - 7

February 2007

22 of 46

Figure 3-1: PCLK to Data Timing

3.2.1 Parallel Input in SMPTE Mode

When the device is operating in SMPTE mode, SMPTE Mode on page 23, data

may be presented to the input bus in either multiplexed or demultiplexed form

depending on the setting of the 20bit/10bit input pin.

In 20-bit mode, (20bit/10bit = HIGH), the input data format should be word aligned,

demultiplexed luma and chroma data. Luma words should be presented to

DIN[19:10] while chroma words should occupy DIN[9:0].

In 10-bit mode, (20bit/10bit = LOW), the input data format should be word aligned,

multiplexed luma and chroma data. The data should be presented to DIN[19:10].

DIN[9:0] will be high impedance in this mode.

3.2.2 Parallel Input in DVB-ASI Mode

When operating in DVB-ASI mode, DVB-ASI Mode on page 25, the GS9062

automatically configures the input port for 10-bit operation regardless of the setting

of the 20bit/10bit pin.

The device will accept 8-bit data words on DIN[17:10] such that DIN17 = HIN is the

most significant bit of the encoded transport stream data and DIN10 = AIN is the

least significant bit.

In addition, DIN19 and DIN18 will be configured as the DVB-ASI control signals

INSSYNCIN and KIN respectively. See DVB-ASI Mode on page 25 for a

description of these DVB-ASI specific input signals.

DIN[9:0] will be high impedance when the GS9062 is operating in DVB-ASI mode.

3.2.3 Parallel Input in Data-Through Mode

When operating in Data-Through mode, Data-Through Mode on page 26, the

GS9062 passes data presented to the parallel input bus to the serial output without

performing any encoding or scrambling.

The input data bus width accepted by the device in this mode is controlled by the

setting of the 20bit/10bit pin.

PCLK

DIN[19:0]

DATA

Control signal

input

tIS

tIH

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