L6726ATR datasheet(15/35 Pages) STMICROELECTRONICS

15 / 35 page

L6726A

Application details

Doc ID 12754 Rev 4

15/35

Application details

8.1

Output voltage selection

L6726A is capable to precisely regulate an output voltage as low as 0.8 V. In fact, the device

comes with a fixed 0.8 V internal reference that guarantees the output regulated voltage to

be within ±1% tolerance over line and temperature variations between 0 °C and 70 °C

(excluding output resistor divider tolerance, when present).

Output voltage higher than 0.8 V can be achieved by adding a resistor ROS between FB pin

and ground. Referring to Figure 1, the steady state DC output voltage will be:

where VREF is 0.8 V.

8.2

Compensation network

The control loop shown in Figure 8 is a voltage mode control loop. The error amplifier is a

transconductance type with fixed gain (3.3 ms typ.). The FB voltage is regulated to the

internal reference, thus the output voltage is fixed accordingly to the output resistor divider

(when present).

Transconductance error amplifier output current generates a voltage across ZF, which is

compared to oscillator saw-tooth waveform to provide PWM signal to the driver section.

PWM signal is then transferred to the switching node with VIN amplitude. This waveform is

filtered by the output filter.

Figure 8.

PWM control loop

The converter transfer function is the small signal transfer function between the voltage at

the output node of the EA (COMP) and VOUT. This function has a double pole (complex

conjugate) at frequency FLC depending on the L-COUT resonance and a zero at FESR

OUT

REF

-----------

⎝⎠

⎛⎞

⋅

OUT

ESR

OSC

ΔV

OSC

OUT

REF

OUTPUT

DIVIDER

PWM

COMPARATOR

OTA

ROS

COMP

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