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PCF85176 датащи(PDF) 6 Page - NXP Semiconductors |
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PCF85176 датащи(HTML) 6 Page - NXP Semiconductors |
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6 / 43 page ![]() PCF85176_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 14 April 2010 6 of 43 NXP Semiconductors PCF85176 Universal LCD driver for low multiplex rates 7. Functional description The PCF85176 is a versatile peripheral device designed to interface any microprocessor or microcontroller with a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing up to four backplanes and up to 40 segments. The possible display configurations of the PCF85176 depend on the number of active backplane outputs required. A selection of display configurations is shown in Table 4. All of these configurations can be implemented in the typical system shown in Figure 4. The host microprocessor or microcontroller maintains the 2-line I2C-bus communication channel with the PCF85176. The internal oscillator is enabled by connecting pin OSC to pin VSS. The appropriate biasing voltages for the multiplexed LCD waveforms are generated internally. The only other connections required to complete the system are the power supplies (VDD, VSS, and VLCD) and the LCD panel chosen for the application. 7.1 Power-On Reset (POR) At power-on the PCF85176 resets to the following starting conditions: • All backplane and segment outputs are set to VLCD • The selected drive mode is: 1:4 multiplex with 1⁄3 bias • Blinking is switched off • Input and output bank selectors are reset • The I2C-bus interface is initialized • The data pointer and the subaddress counter are cleared (set to logic 0) Table 4. Display configurations Number of: 7-segment alphanumeric 14-segment alphanumeric Dot matrix Backplanes Elements Digits Indicator symbols Characters Indicator symbols 4 160 20 20 10 20 160 dots (4 × 40) 3 120 15 15 8 8 120 dots (3 × 40) 2 80 10 10 5 10 80 dots (2 × 40) 1 40 5 5 2 12 40 dots (1 × 40) The resistance of the power lines must be kept to a minimum. Fig 4. Typical system configuration HOST MICRO- PROCESSOR/ MICRO- CONTROLLER tr 2CB SDA SCL OSC 40 segment drives 4 backplanes LCD PANEL (up to 160 elements) PCF85176 A0 A1 A2 SA0 VDD VSS VSS VDD VLCD 013aaa071 R ≤ |
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