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FIP4F8S датащи(PDF) 25 Page - Fuji Electric |
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FIP4F8S датащи(HTML) 25 Page - Fuji Electric |
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25 / 33 page ![]() AN-087E Rev.1.0 April-2011 25 FA5526/5527/5528/5536/5537/5538 Fuji Electric Co., Ltd. http://www.fujielectric.co.jp/products/semiconductor/ 10.Design advice (1) Start-up and stop To properly start up and stop the power supply, optimum values shall be set for capacitors connected to the CS pin and VCC pin. (1-1) At start-up (1) It takes certain time until the output voltage reaches to the set voltage after the IC has been activated. During this period, FB pin voltage reaches its maximum voltage and the 4V clamp circuit does not operate. As a result, with proper CS pin capacitance and proper start-up, CS pin voltage waveform during start-up will be as shown in Fig.22. On the other hand, when CS pin capacitance is too small, CS pin voltage may reach the threshold voltage of the latch mode as shown in Fig.23 before the output voltage increases to the set value. The IC changes into a latch mode and the power supply cannot start properly. In cases like this, increase CS pin capacitance. (1-2) At start-up (2) Fig.24 shows Vcc voltage at start-up when proper capacitance is connected. When input power is turned on, the VCC capacitor is charged by the current supplied from the start-up circuit and its voltage increases. Then, when Vcc reaches the ON threshold voltage, the IC starts operation. In steady operation, the IC operates at the voltage supplied from an auxiliary winding. Right after IC start-up, however, Vcc drops until the auxiliary voltage increases sufficiently. Determine the capacitance connected to VCC pin so that Vcc does not drop to the OFF threshold voltage in any condition. We recommend that you choose the capacitance connected to VCC pin so that the bottom of Vcc becomes larger than 11V as the result of typical experiment. Secondary Side DC Output Voltage CS pin Voltage FB pin Voltage 8.5V Start-up of IC 4V a) After CS pin exceeds 4V, FB pin voltage drops. Start-up of IC 3V b) Before CS pin exceeds 4V, FB pin voltage drops. Fig.22 CS pin voltage waveform at start-up (1) ( normal start ) 8.5V Latch Mode Secondary Side DC Output Voltage CS pin Voltage FB pin Voltage Start-up of IC DC output set voltage Fig.23 CS pin voltage waveform at start-up (2) (when the power supply can not start up) Fig.24 Vcc waveform at start-up (1) (at normal start-up) |
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