IMX28CEC datasheet(44/70 Pages) FREESCALE

номер детали	IMX28CEC

подробное описание детали	Processors Data Sheet for Consumer Products

PDF	70 Pages

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производитель	FREESCALE [Freescale Semiconductor, Inc]

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i.MX28 Applications Processors Data Sheet for Consumer Products, Rev. 1

Freescale Semiconductor

Table 48. NFC Timing Parameters1

1 The Flash clock maximum frequency is 100 MHz.

2)GPMI’s output timing could be controlled by module’s internal register, say

HW_GPMI_TIMING0_ADDRESS_SETUP,HW_GPMI_TIMING0_DATA_SETUP,HW_GPMI_TIMING0_DATA_HOLD, this AC

timing depends on these registers’ setting. In the above table we use AS/DS/DH representing these settings each.

3)AS minimum value could be 0, while DS/DH minimum value is 1.

Parameter

Symbol

Timing

T = GPMI Clock Cycle

Example Timing for

GPMI Clock

≈ 100MHz

T = 10ns

Unit

Min.

Max.

Min.

Max.

NF1

CLE setup time

tCLS

(AS+1)*T

—

NF2

CLE hold time

tCLH

(DH+1)*T

—

NF3

CEn setup time

tCS

(AS+1)*T

—

NF4

CE hold time

tCH

(DH+1)*T

—

NF5

WE pulse width

tWP

DS*T

NF6

ALE setup time

tALS

(AS+1)*T

—

NF7

ALE hold time

tALH

(DH+1)*T

—

NF8

Data setup time

tDS

DS*T

—

NF9

Data hold time

tDH

DH*T

—

NF10

Write cycle time

tWC

(DS+DH)*T

NF11

WE hold time

tWH

DH*T

NF12

Ready to RE low

tRR

(AS+1)*T

—

NF13

RE pulse width

tRP

DS*T

—

NF14

READ cycle time

tRC

(DS+DH)*T

—

NF15

RE high hold time

tREH

DH*T

—

NF16

Data setup on read

tDSR

N/A

—

NF17

Data hold on read

tDHR

N/A

—

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