MC68340 datasheet(67/962 Pages) MOTOROLA

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MOTOROLA

MC68360 USER’S MANUAL

3-1

SECTION 3

QUICC MEMORY MAP

The following tables present a programmer’s model (register map) of all registers in the

QUICC. For more information about a particular register, refer to the description for the mod-

ule or sub-module indicated in the right column. The address column indicates the offset of

the register from the address stored in the module base address register (MBAR). This reg-

ister in the SIM block controls the location of all internal memory/registers as well as their

supervisor/user access space (see Section 6 System Integration Module (SIM60)). Bold let-

ters mark registers that are restricted to supervisor access. Other registers are programma-

ble to exist in either supervisor or user space. Registers that are reset only by hard reset are

marked with an H in the reset value column. All of the registers are memory-mapped.

All internal memory and registers occupy a single 8-Kbyte memory block that is relocatable

along 8-Kbyte boundaries. The location is fixed by writing the desired base address of the

8-Kbyte memory block to the MBAR using the MOVES instruction. The MBAR is the only

exception since it resides at a fixed location in $03FF00.

The 8-Kbyte block is divided into two 4-Kbyte sections. The RAM occupies the first section;

the internal registers occupy the second section. The location of the QUICC registers is

shown in Figure 3-1.

Thi d

t d

ith F

M k

4 0 4

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