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70592C датащи(PDF) 308 Page - Microchip Technology |
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70592C датащи(HTML) 308 Page - Microchip Technology |
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308 / 314 page ![]() PIC24HJXXXGPX06A/X08A/X10A DS70592C-page 308 © 2011 Microchip Technology Inc. F Flash Program Memory....................................................... 61 Control Registers ........................................................ 62 Operations .................................................................. 62 Programming Algorithm .............................................. 64 RTSP Operation.......................................................... 62 Table Instructions........................................................ 61 Flexible Configuration ....................................................... 217 FSCM Delay for Crystal and PLL Clock Sources................... 70 Device Resets............................................................. 70 H High Temperature Electrical Characteristics..................... 275 I I/O Ports ............................................................................ 143 Parallel I/O (PIO)....................................................... 143 Write/Read Timing .................................................... 144 I2C Operating Modes ...................................................... 165 Registers................................................................... 165 I2C Module I2C1 Register Map ...................................................... 42 I2C2 Register Map ...................................................... 42 In-Circuit Debugger ........................................................... 224 In-Circuit Emulation........................................................... 217 In-Circuit Serial Programming (ICSP) ....................... 217, 224 Input Capture Registers................................................................... 154 Input Change Notification Module ..................................... 144 Instruction Addressing Modes............................................. 55 File Register Instructions ............................................ 55 Fundamental Modes Supported.................................. 56 MCU Instructions ........................................................ 55 Move and Accumulator Instructions............................ 56 Other Instructions........................................................ 56 Instruction Set Overview ................................................................... 227 Summary................................................................... 225 Instruction-Based Power-Saving Modes ........................... 135 Idle ............................................................................ 136 Sleep......................................................................... 135 Internal RC Oscillator Use with WDT ........................................................... 223 Internet Address................................................................ 303 Interrupt Control and Status Registers................................ 75 IECx ............................................................................ 75 IFSx............................................................................. 75 INTCON1 .................................................................... 75 INTCON2 .................................................................... 75 INTTREG .................................................................... 75 IPCx ............................................................................ 75 Interrupt Setup Procedures ............................................... 113 Initialization ............................................................... 113 Interrupt Disable........................................................ 113 Interrupt Service Routine .......................................... 113 Trap Service Routine ................................................ 113 Interrupt Vector Table (IVT) ................................................ 71 Interrupts Coincident with Power Save Instructions.......... 136 J JTAG Boundary Scan Interface ........................................ 217 M Memory Organization ......................................................... 31 Microchip Internet Web Site.............................................. 303 Modes of Operation Disable...................................................................... 181 Initialization ............................................................... 181 Listen All Messages.................................................. 181 Listen Only................................................................ 181 Loopback .................................................................. 181 Normal Operation ..................................................... 181 MPLAB ASM30 Assembler, Linker, Librarian ................... 234 MPLAB Integrated Development Environment Software.. 233 MPLAB PM3 Device Programmer .................................... 236 MPLAB REAL ICE In-Circuit Emulator System ................ 235 MPLINK Object Linker/MPLIB Object Librarian ................ 234 Multi-Bit Data Shifter........................................................... 30 N NVM Module Register Map .............................................................. 54 O Open-Drain Configuration................................................. 144 Output Compare ............................................................... 155 P Packaging ......................................................................... 285 Details....................................................................... 288 Marking ..................................................................... 285 Peripheral Module Disable (PMD) .................................... 136 Pinout I/O Descriptions (table)............................................ 19 PMD Module Register Map .............................................................. 54 POR and Long Oscillator Start-up Times ........................... 70 PORTA Register Map .............................................................. 52 PORTB Register Map .............................................................. 52 PORTC Register Map .............................................................. 52 PORTD Register Map .............................................................. 52 PORTE Register Map .............................................................. 53 PORTF Register Map .............................................................. 53 PORTG Register Map .............................................................. 53 Power-Saving Features .................................................... 135 Clock Frequency and Switching ............................... 135 Program Address Space..................................................... 31 Construction ............................................................... 57 Data Access from Program Memory Using Program Space Visibility..................................... 60 Data Access from Program Memory Using Table Instructions ..................................... 59 Data Access from, Address Generation ..................... 58 Memory Map............................................................... 31 Table Read Instructions TBLRDH ............................................................. 59 TBLRDL.............................................................. 59 Visibility Operation ...................................................... 60 Program Memory Interrupt Vector........................................................... 32 Organization ............................................................... 32 Reset Vector............................................................... 32 |
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