70592C datasheet(230/314 Pages) MICROCHIP

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PIC24HJXXXGPX06A/X08A/X10A

DS70592C-page 230

TABLE 22-1:

SYMBOLS USED IN OPCODE DESCRIPTIONS

Field

Description

#text

Means literal defined by “text”

(text)

Means “content of text”

[text]

Means “the location addressed by text”

{ }

Optional field or operation

<n:m>

Byte mode selection

Double Word mode selection

Shadow register select

Word mode selection (default)

bit4

4-bit bit selection field (used in word addressed instructions)

∈ {0...15}

C, DC, N, OV, Z

MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero

Expr

Absolute address, label or expression (resolved by the linker)

File register address

∈ {0x0000...0x1FFF}

lit1

1-bit unsigned literal

∈ {0,1}

lit4

4-bit unsigned literal

∈ {0...15}

lit5

5-bit unsigned literal

∈ {0...31}

lit8

8-bit unsigned literal

∈ {0...255}

lit10

10-bit unsigned literal

∈ {0...255} for Byte mode, {0:1023} for Word mode

lit14

14-bit unsigned literal

∈ {0...16384}

lit16

16-bit unsigned literal

∈ {0...65535}

lit23

23-bit unsigned literal

∈ {0...8388608}; LSB must be ‘0’

None

Field does not require an entry, may be blank

Program Counter

Slit10

10-bit signed literal

∈ {-512...511}

Slit16

16-bit signed literal

∈ {-32768...32767}

Slit6

6-bit signed literal

∈ {-16...16}

Base W register

∈ {W0..W15}

Destination W register

∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }

Wdo

Destination W register

∈

{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }

Wm,Wn

Dividend, Divisor working register pair (direct addressing)

Wm*Wm

Multiplicand and Multiplier working register pair for Square instructions

∈

{W4 * W4,W5 * W5,W6 * W6,W7 * W7}

Wm*Wn

Multiplicand and Multiplier working register pair for DSP instructions

∈

{W4 * W5,W4 * W6,W4 * W7,W5 * W6,W5 * W7,W6 * W7}

One of 16 working registers

∈ {W0..W15}

Wnd

One of 16 destination working registers

∈ {W0...W15}

Wns

One of 16 source working registers

∈ {W0...W15}

WREG

W0 (working register used in file register instructions)

Source W register

∈ { Ws, [Ws], [Ws++], [Ws--], [++Ws], [--Ws] }

Wso

Source W register

∈

{ Wns, [Wns], [Wns++], [Wns--], [++Wns], [--Wns], [Wns+Wb] }

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