XMEGAD datasheet(3/309 Pages) ATMEL

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8210B–AVR–04/10

XMEGA D

Overview

The XMEGA D is a family of low power, high performance and peripheral rich CMOS 8/16-bit

microcontrollers based on the AVR enhanced RISC architecture. By executing powerful instruc-

tions in a single clock cycle, the XMEGA D achieves throughputs approaching 1 Million

Instructions Per Second (MIPS) per MHz allowing the system designer to optimize power con-

sumption versus processing speed.

The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction, executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs many times faster than conven-

tional single-accumulator or CISC based microcontrollers.

The XMEGA D devices provide the following features: In-System Programmable Flash with

Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel Event System and

Programmable Multi-level Interrupt Controller, up to 78 general purpose I/O lines, 16-bit Real

Time Counter (RTC), up to five flexible 16-bit Timer/Counters with compare modes and PWM,

up to four USARTs, one I

2C and SMBUS compatible Two Wire Serial Interface (TWI), up to two

Serial Peripheral Interfaces (SPIs), 16-channel, 12-bit ADC, with optional differential input and

programmable gain, two analog comparators with window mode, programmable Watchdog

Timer with separate Internal Oscillator, accurate internal oscillators with PLL and prescaler, and

programmable Brown-Out Detection.

The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,

is available.

The XMEGA D devices have five software selectable power saving modes. The Idle mode stops

the CPU while allowing the SRAM, Event System, Interrupt Controller and all peripherals to con-

tinue functioning. The Power-down mode saves the SRAM and register contents but stops the

oscillators, disabling all other functions until the next TWI- or pin-change interrupt, or Reset. In

Power-save mode, the asynchronous Real Time Counter continues to run, allowing the applica-

tion to maintain a timer base while the rest of the device is sleeping. In Standby mode, the

Crystal/Resonator Oscillator is kept running while the rest of the device is sleeping. This allows

very fast start-up from external crystal combined with low power consumption. In Extended

Standby mode, both the main Oscillator and the Asynchronous Timer continue to run. To further

reduce power consumption, the peripheral clock to each individual peripheral can optionally be

stopped in Active mode and Idle sleep mode.

The devices are manufactured using Atmel's high-density nonvolatile memory technology. The

program Flash memory can be reprogrammed in-system through the PDI. A Bootloader running

in the device can use any interface to download the application program to the Flash memory.

The Bootloader software in the Boot Flash section will continue to run while the Application

Flash section is updated, providing true Read-While-Write operation. By combining an 8/16-bit

RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA D is a powerful micro-

controller family that provides a highly flexible and cost effective solution for many embedded

applications.

The XMEGA D devices are supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, programmers, and

evaluation kits.

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