ISDN TA POTS Interface

CMX625

 2001 Consumer Microcircuits Limited

20

D/625/2

1.5.14 Register Set

Write Only Registers

Data Byte Structure

Addr.

Register

7

6

5

4

3

2

1

0

$1

RESET

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

$3

SETUP

Tx Output

Buffer

0=Disable

1=Enable

Tx Enable

0=Disable

1=Enable

DTMF Rx:

0=Disable

1=Enable

SPM:

0=12kHz

1=16kHz

Ring Signal

Select [1]

Ring Signal

Select [0]

FSK Mode:

0=Sync

1=Async

FSK Mode:

0=V23

1=Bell 202

$4

MODE

SPM O/P:

0=Disable

1=Enable

Tone/FSK:

0=Disable

1=Enable

Tone/FSK:

0=Tone

1=FSK

Tx Level:

MSB

Tx Level:

Tx Level:

LSB

Tone Fields:

MSB

Tone Fields:

LSB

$5

TX

DATA

D7

MSB

D6

D5

D4

D3

D2

D1

D0

LSB

$6

TX

TONES

D7

MSB

D6

D5

D4

LSB

D3

MSB

D2

D1

D0

LSB

$8

IOM

CONTROL

Codec

Channel

Select [1]

Codec

Channel

Select [0]

0

IC Channel

Bus Reversal

0=Normal

1=Reverse

Remote

Digital IOM

Loopback

0=No loopbk

1=Loopback

C/I1

Channel

Output

Control [2]

C/I1

Channel

Output

Control [1]

C/I1

Channel

Output

Control [0]

$9

INT-

ERRUPT

MASK

Mask

Status [7]

Mask

Status [6]

Mask

Status [5]

Mask

Status [4]

Mask

Status [3]

Mask

Status [2]

0

0

$C

CODEC

CONTROL

Codec

Enable

0=Disable

1=Enable

PCM Codec:

0=A-Law

1=µ-Law

Local

Analogue

Loopback

0=No loopbk

1=Loopback

0

0

0

0

0

Read Only Registers

Data Byte Structure

Addr.

Register

7

6

5

4

3

2

1

0

$0

DEVICE

ID

1

0

0

1

1

0

0

1

$A

STATUS

FSK Mode:

FSK Tx Data

Underflow

FSK Mode:

FSK Tx Data

Ready

DTMF Rx:

Status

Change

DTMF Rx:

1=Detected

0=No Tone

Time Out

IOM:

Tx

Abort

IOM:

Rx

Abort

0

0

$B

DTMF RX

DATA

0

0

0

0

DTMF:

Rx Data

(D3 MSB)

DTMF:

Rx Data

(D2)

DTMF:

Rx Data

(D1)

DTMF:

Rx Data

(D0 LSB)

Notes:

1. Accessing the RESET Register clears all of the bits in the SETUP, MODE, TX DATA, TX TONES,

IOM CONTROL, INTERRUPT MASK, CODEC CONTROL, STATUS and DTMF RX DATA registers

and will initialise the device. This a single-byte transaction consisting of the address byte value $1.

2. If any of bits 2, 3, 4, 5, 6 or 7 of the STATUS Register is ‘1’ then the IRQN output will be pulled low

when the appropriate bit contains an unmasked logic ‘1’ in the INTERRUPT MASK Register.

3. Reading the STATUS Register clears the IRQN output (when the appropriate bit contains an

unmasked logic ‘1’ in the INTERRUPT MASK Register) and also clears all the STATUS Register bits 2

to 7, if set.

1.5.15 Programming the CMX625