WITH RATIOMETRIC OUTPUT

Rev B1, Page 21/22

TEST MODES

iC-MP has several test settings which make internal

reference quantities and the amplified, differential Hall

voltages of the sensor pairs accessible at external pins

for measurement purposes. This signals enables a

chip/package to be adjusted in relation to the magnet.

Test modes can be triggered by programming the pa-

rameter TEST (D(51:48)). The individual test modes

are listed in the following table.

See ’ELECTRICAL CHARACTERISTICS’.

Op. Mode

TEST(3:0)

Pin NERR

Pin LAO

Pin PSMO

Comments

analog

digital

Normal

0ddd

-

NERR

LAO

PSMO

Test 0

1000

PSIN

-

PCOS

PSMO

Test 1

1001

NSIN

-

NCOS

PSMO

Test 2

1010

GAIN

-

VREF

PSMO

Notes

d = don’t care

Table 9: Test modes

DESIGN REVIEW: Notes On Chip Functions

iC-MP Y

No.

Function, Parameter/Code

Description and Application Notes

1

Slow Scanning Mode

(without a magnet):

Serial Interface Mode is discontinued without a magnet

- The start bit is not available

- The daisy chain is stopped

Table 10: Notes on chip functions regarding iC-MP chip releas Y

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