Philips Semiconductors

PCKEL14

2.5 V/3.3 V PECL/ECL 1:5 clock distribution chip

Product data

Rev. 01 — 14 October 2002

5 of 15

9397 750 09564

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

8.

Static characteristics

[1]

Devices are designed to meet the DC specifications shown in this table, after thermal equilibrium has been established. The circuit is in

a test socket or mounted on a printed circuit board and transverse air flow greater than 500 LFPM is maintained.

[2]

[3]

All loading with 50

Ω to V

[4]

[5]

differential input signal.

Table 5:

PECL DC characteristics[1]

Symbol

Parameter

Conditions

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

power supply current

-

28

40

-

30

40

-

31

42

mA

HIGH-level output

voltage

[3]

1325 1460 1620 1435 1545 1620 1475 1545 1620 mV

LOW-level output

voltage

[3]

670

805

945

690

795

880

690

795

880

mV

HIGH-level input

voltage

single-ended

[4]

1310 -

1620 1335 -

1620 1335 -

1620 mV

LOW-level input voltage single-ended

[4]

690

-

1025 690

-

1025 690

-

1025 mV

output voltage

reference

1.07

-

1.25

1.15

-

1.25

1.15

-

1.31

V

HIGH-level input

voltage, common mode

range (differential)

[5]

1.2

-

2.1

1.2

-

2.1

1.2

-

2.1

V

HIGH-level input current

-

-

150

-

-

150

-

-

150

µA

LOW-level input current

CLK

0.5

-

-

0.5

-

-

0.5

-

-

µA

CLK

−300 -

-

−300 -

-

−300 -

-

µA