Philips Semiconductors

PCKEL14

2.5 V/3.3 V PECL/ECL 1:5 clock distribution chip

Product data

Rev. 01 — 14 October 2002

2 of 15

9397 750 09564

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

3.

Pinning information

3.1 Pinning

3.2 Pin description

3.2.1

Power supply connection

Fig 1.

SO20 pin configuration.

Fig 2.

TSSOP pin configuration.

002aaa217

1

2

3

4

5

6

7

8

9

10

Q0

Q0

Q1

Q1

Q2

Q2

Q3

Q3

Q4

Q4

20

19

18

17

16

15

14

13

12

11

VCC

EN

VCC

NC

SCLK

CLK

CLK

VBB

SEL

VEE

002aaa353

1

2

3

4

5

6

7

8

9

10

Q0

Q0

Q1

Q1

Q2

Q2

Q3

Q3

Q4

Q4

VCC

EN

VCC

NC

SCLK

CLK

CLK

VBB

SEL

VEE

20

19

18

17

16

15

14

13

12

11

Table 1:

Pin description

Symbol

Pin

Description

Q0-Q4

1, 3, 5, 7, 9

ECL differential clock outputs, non-inverted

Q0-Q4

2, 4, 6, 8, 10

ECL differential clock outputs, inverted

11

negative supply voltage

SEL

12

ECL clock select input

13

reference voltage output

CLK

14

ECL differential clock input, inverted

CLK

15

ECL differential clock input, non-inverted

SCLK

16

ECL scan clock input

NC

17

no connect

EN

19

ECL synchronous enable, Active-LOW

18, 20

positive supply voltage

CAUTION

supply to guarantee proper operation.

MSC895