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LM3450 датащи(PDF) 17 Page - National Semiconductor (TI) |
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LM3450 датащи(HTML) 17 Page - National Semiconductor (TI) |
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17 / 28 page ![]() 30127431 FIGURE 10. Dimming Decoder Circuit PHASE DIMMING DECODER The LM3450 uses the rectified AC line voltage to interpret the conduction angle. Figure 10 shows the LM3450 decoder cir- cuit with associated external circuitry. The rectified AC line voltage is scaled via a resistor divider (R AC1, RAC2) and con- nected to the V AC pin. VAC is compared to a 356mV reference to generate a twice line frequency PWM signal with corre- sponding duty cycle as shown in Figure 11. 30127432 FIGURE 11. Phase Angle Demodulation For best results, R AC1 and RAC2 are suggested to be sized so that the V AC voltage crosses the 356mV threshold when the rectified AC line is as follows: • 120V systems: 20V to 30V • 230V systems: 40V to 60V The demodulated duty cycle is sampled and logarithmically remapped to a 300Hz PWM signal improving the resolution of low dimming levels to the human eye. A minimum duty cy- cle limits the maximum achievable contrast ratio to approxi- mately 70:1. The remapped PWM signal is buffered and output at FLT1 with amplitude equal to V ADJ as shown in Fig- ure 12. 30127433 FIGURE 12. FLT1 to FLT2 Mapping The FLT1 signal is routed through a 2 pole low pass filter (R F1, CF1, RF2, CF2), as shown in Figure 10, to remove the twice line frequency ripple. The resulting analog signal at FLT2 is compared to a 500Hz Triangle wave to create the inverted PWM signal at the DIM pin as shown in Figure 13: 30127434 FIGURE 13. FLT2 to DIM Mapping 17 www.national.com |
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