PD-60325

iP2005APbF

Internal Block Diagram

Figure 11 Internal Block Diagram

Pin Description

Pin Number

Pin Name

Description

1, 8

V

IN

Input voltage pin. Connect input capacitors close to this pin.

2

Vsw

Voltage Switching Node – pin connection to the output inductor.

3P

GND

Power Ground

4V

DD

Supply voltage to internal circuitry.

5PWM

TTL level input to MOSFET drivers. When PWM is HIGH, the Control

FET is on and the Sync FET is off. When PWM is LOW, the Sync FET

is on and the Control FET is off.

6

ENABLE

When set to logic level high, internal circuitry of the device is enabled.

When set to logic level low, the Control and Synchronous FETs are

turned off.

7CV

CC

Output of internal regulator. Attached a minimum of 1.0µF capacitance

from this pin to PGND. Recommended to use 16V, X5R, Ceramic type

capacitor.

www.irf.com

2/8/2008

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