Pin setting

SPZB250

6/18

Doc ID 13919 Rev 6

Pin n

Pin name

Direction

Description

10

GPIO2

I/O

Digital I/O

MSCLK

O

SPI master clock of serial controller SC2

MSCLK

I

SPI slave clock of serial controller SC2

SCL

I/O

TMR2IA.2

I

Capture of input B of timer 2

11

GND

--

Ground

12

VDD

Power

Input power supply

13

GPIO7

I/O

Digital I/O

ADC3

Analog

ADC input 3

REG_EN

O

External regulator open collector output

14

GPIO8

I/O

Digital I/O

VREF_OUT

Analog

ADC reference output

TMR1CLK

I

External clock input of timer 1

TMR2ENMSK

I

External enable mask of timer 2

IRQA

I

External interrupt source A

15

GPIO9

I/O

Digital I/O

TXD

O

UART transmit data of serial controller SC1

MO

O

SPI master data out of serial controller SC1

MSDA

I/O

TMR1IA.2

I

Capture of input A of timer 2

16

GPIO10

I/O

Digital I/O

RXD

I

UART receive data of serial controller SC1

MI

I

SPI master data in of serial controller SC1

MSCL

I/O

TMR1IB.2

I

Capture of input B of timer 2

17

SIF_CLK

I

Non-intrusive debug interface

Serial interface clock signal (internal pull-down)

18

SIF_MISO

O

Non-intrusive debug interface

Serial interface master IN/ slave out

19

SIF_MOSI

I

Non-intrusive debug interface

Serial interface master out/ slave in

To guarantee a proper signal level when in deep sleep mode

connect a 10k

Ω resistor to GND

20

SIF_LOADB

I/O

Non-intrusive debug interface

Serial interface load strobe (Open collector with internal pull-up)

To improve noise immunity connect a 10 k

Ω resistor to V

DD

Table 1.

Pin description (continued)