IXP45X datasheet(114/148 Pages) INTEL

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Intel® IXP45X and Intel® IXP46X Product Line of Network Processors—Datasheet

Intel® IXP45X and Intel® IXP46X Product Line of Network Processors

Datasheet

August 2006

114

Document Number: 306261-004US

5.5.17

All Remaining I/O DC Parameters

5.6

AC Specifications

5.6.1

Clock Signal Timings

5.6.1.1

Processors’ Clock Timings

Table 46.

All Remaining I/O DC Parameters (JTAG, PLL_LOCK)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

Notes

VIH

Input-high voltage

2.0

VIL

Input-low voltage

0.8

VOH

Output-high voltage

IOUT = - 4mA

2.4

VOL

Output-low voltage

IOUT = 4mA

0.4

IIL

Input-leakage current

0 < VIN < VCCP

-10

µA

CIN

Input-pin capacitance

Notes:

These values are typical values seen by the manufacturing process and are not tested.

These parameters are only applicable to signal other than power and ground signals.

Table 47.

Devices’ Clock Timings

Symbol

Parameter

Min.

Nom.

Max.

Units

Notes

VIH

Input-high voltage

2.0

VIL

Input-low voltage

0.8

TFREQUENCY

Clock frequency for IXP45X/IXP46X

network processors oscillator.

33.33

MHz

1, 2

FREQUENCY

Clock tolerance over -40º C to 85º C.

-50

ppm

CIN

Pin capacitance of IXP45X/IXP46X

network processors inputs.

5pF

TDC

Duty cycle

Notes:

This value is oscillator input. Leave the oscillator output pin as a no-connect.

Where the IXP45X/IXP46X network processors are configured with an input reference-clock, the slew

rate should never be faster than 2.5 V/nS to ensure proper PLL operation. To properly guarantee PLL

operation at the slower slew rate, the Vih and Vil levels need to be met at the 33.33MHz frequency.

Table 48.

Processors’ Clock Timings Spread Spectrum Parameters

Spread-Spectrum

Conditions

Min

Max

Notes

Frequency deviation from

33.33 MHz as a percentage

-2.0%

+0.0%

Characterized and guaranteed by design, but not

tested. Do not over-clock the PLL input. The A.C.

timings will not be guaranteed if the device exceeds

33.33 MHz.

Modulation Frequency

50 KHz

Characterized and guaranteed by design, but not

tested

Notes:

It is important to note that when using spread spectrum clocking, other clocks in the system will

change frequency over a specific range. This change in other clocks can present some system level

limitations. Please refer to the application note titled Spread Spectrum Clocking to Reduce EMI

Application Note, when designing a product that utilizes spread spectrum clocking.

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