M24256-DR datasheet(17/42 Pages) STMICROELECTRONICS

17 / 42 page

M24256-BF, M24256-BR, M24256-BW, M24256-DR

Device operation

Doc ID 6757 Rev 21

17/42

3.9

Identification Page Write (M24256-DR only)

The Identification page is written by issuing an ID Write instruction. This instruction uses the

same protocol and format as the Page Write in memory array, except for the following

differences:

●

Device Type Identifier = 1011b

●

MSB address bits A15/A6 are don't care except for address bit A10 which must be ‘0’.

LSB address bits A5/A0 define the byte address inside the identification page.

If the Identification page is locked, the data bytes transferred during the Identification Page

Write instruction are not acknowledged (NoAck).

3.10

Lock Identification Page (M24256-DR only)

The Lock Identification Page instruction (Lock ID) permanently locks the Identification page

in read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with

the following specific conditions:

●

Device Type Identifier = 1011b

●

Address bit A10 must be ‘1’; all other address bits are don't care

●

The data byte must be equal to the binary value xxxx xx1x, where x is don't care.

If the Identification Page is locked, the data bytes transferred during the ID Write instruction

are not acknowledged (NoAck).

3.11

ECC (error correction code) and write cycling

The M24256-Bx and M24256-DRdevices offer an ECC (error correction code) logic which

compares each 4-byte word with its six associated ECC EEPROM bits. As a result, if a

single bit out of 4 bytes of data happens to be erroneous during a Read operation, the ECC

detects it and replaces it by the correct value. The read reliability is therefore much improved

by the use of this feature.

Note however that even if a single byte has to be written, 4 bytes are internally modified

(plus the ECC bits), that is, the addressed byte is cycled together with the other three bytes

making up the word. It is therefore recommended to write by word (4 bytes) in order to

benefit from the larger amount of Write cycles.

The M24256-Bx and M24256-DR devices are qualified at 1 million (1 000 000) Write cycles,

using a cycling routine that writes to the device by multiples of 4-bytes.

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