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LM8322 датащи(PDF) 8 Page - National Semiconductor (TI) |
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LM8322 датащи(HTML) 8 Page - National Semiconductor (TI) |
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8 / 42 page ![]() 9.0 Clocks • System Clock (mclk) — The system clock is in the range of about 21 MHz (± 7%) typical. This clock is used to drive the I2C compatible serial ACCESS bus and is the input clock for other function blocks. • Processing and Command Execution Clock (t C) — The internal processing is based on a 2 MHz clock. This clock is derived from the System Clock. • Internal PWM Clock — The internal PWM clock is a fixed scaled down clock (÷ 64) of the Processing and Command Execution Clock. This clock is close to 32 kHz which is in a good range to source the PWM function block as an alternative to an external clock source. • External 32.768 kHz Clock — driven into the SLOWCLK input. May be used internally as the timebase for the PWM and driven on the SLOWCLKOUT output. • External 32.768 kHz Crystal — connected across the XTAL_IN and XTAL_OUT pins (XTAL_IN is an alternate function of the SLOWCLK pin). May be used internally as the timebase for the PWM and driven on the SLOWCLKOUT output. 30013602 FIGURE 2. Clock Architecture 9.1 INTERNAL EXECUTION CYCLE The Processing - and Command - execution clock is about 2 MHz. This clock is stopped in Halt mode, which only occurs under control of the LM8322. However, the host can set the period of inactivity which causes the device to enter Halt mode. Exit from Halt mode can be triggered by any of these events: • Occurrence of a key-press or key-release event. • A Start condition driven by the host on the ACCESS.bus interface. • Assertion of the RESET input. After reset, the default timebase for the PWM outputs is the internal execution clock divided by 64. 9.2 BUFFERED CLOCK The timebase for the PWM comes from any of three sources: • Prescaled internal Execution clock. • External 32.768 kHz clock received on the SLOWCLK input. • On-chip oscillator with an external crystal connected across XTAL_IN and XTAL_OUT. Any of these sources may be buffered and driven on the SLOWCLKOUT output. The clock buffer is enabled with the WRITE_CLOCK command. If XTAL_IN is not used it must be terminated to V CC or GND. www.national.com 8 |
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