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SST26WF032 датащи(PDF) 29 Page - Silicon Storage Technology, Inc |
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SST26WF032 датащи(HTML) 29 Page - Silicon Storage Technology, Inc |
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29 / 36 page ![]() ©2010 Silicon Storage Technology, Inc. S71409-01-000 01/10 29 1.8V Serial Quad I/O (SQI) Flash Memory SST26WF032 Advance Information Power-Up Specifications All functionalities and DC specifications are specified for a VDD ramp rate of greater than 1V per 100 ms (0V to 1.65V in less than 270 ms). See Table 11 and Figure 26 for more information. Figure 26:Power-up Timing Diagram Table 11: Recommended System Power-up Timings Symbol Parameter Minimum Units TPU-READ1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. VDD Min to Read Operation 100 µs TPU-WRITE1 VDD Min to Write Operation 100 µs T11.0 1409 Time VDD Min VDD Max VDD Device fully accessible TPU-READ TPU-WRITE Chip selection is not allowed. Commands may not be accepted or properly interpreted by the device. 1409 F27.0 |
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